Debugging Constant-Current source

Thread Starter

Mohsin Anees

Joined Jun 20, 2015
8
What I'm trying to do?
I'm making a constant-current source based off an existing design. The specs of the existing design are:

Existing Design
The design is of a constant current source capable of outputting 4-20mA output current from an input voltage of 0-2V.

enter image description here

The Problem
The problem is when physically making the circuit, the output of this circuit is stuck at 56mA irrespective of input.

I cannot find/contact the original author of the schematics to discuss the problem and its up to me to figure this out.

The simulations also show the same results as in reality:

1615403237187.png

enter image description here

Simulation Findings
Input: Sinusoidal Wave of 0-2V peaks of frequency 1 per second
Output Current: Constant current of 56 mA
Output Voltage: 13.6474V with small ripples with amplitude in microvolts.

Question
1) Where should I start looking for issues?
2) What is the name of the op-amp configuration being used in the second stage? I do know that the
first stage is a voltage follower.

enter image description here
 
Last edited:

crutschow

Joined Mar 14, 2008
27,751
You show no power to U4B in the simulation (the real circuit only needs one connection all all op amps in a package but the simulation needs power to all of them).

The second stage is configured to generate a constant current through R10 and R9 proportional to the voltage at pin 3 of U4A, to provide a constant output current.
 

Thread Starter

Mohsin Anees

Joined Jun 20, 2015
8
In Proteus, we can get away with this small assumption. I've just ran the simulation again by providing each instance the 24VDC and GND. Still same results.

Thank you for the insight on the second stage, I'll check this stage in isolation by providing voltage on pin 3 of U4A directly to see that it responds.
 

Thread Starter

Mohsin Anees

Joined Jun 20, 2015
8
@Alec_t I was afraid of that, so I did check it throughly. I found these symbols in google image section and found exact matches.

1615405357837.png


I'll run the simulation by inverting the FET nonetheless, maybe it will work.
 

Thread Starter

Mohsin Anees

Joined Jun 20, 2015
8
@Alec_t so the simulation generated a few warnings. But ignoring that, the output is starting to make sense a little, that its a clipped sinusoid. Don't know whether we are getting warmer or colder :)

1615405888731.png
 

jeffl_2

Joined Sep 17, 2013
50
It's pretty clear from inspection, the first stage is a simple voltage buffer, the second stage is actually the current source, referenced to ground. The third stage is a "current mirror" with a gain of 5 (ratio of R5/R1 or R10/R9) which reflects the current off of the voltage supply so the output can go INTO ground. If the third stage has a gain of 5 then the current range of the second stage ought to be from 0.8 to 4 milliamperes. You should now be able to verify the correct operation of each current stage, that should at least allow you to verify each stage independently.
 

PinkMoors

Joined Nov 28, 2016
2
As a general point of interest Analog Devices make the AD693 which will do exactly what you need with very little fuss. https://www.analog.com/en/products/ad693.html#product-overview

We have used this part in numerou projects. It's not cheap but nor is spending time on a bespoke solution. The ad693 is tough as nails and is very flexible. It will stand high operating temperatures and a fair amount of abuse, lik my trying to read current across a 25 Ohm load resistor instead of the 250 Ohm I thought I had chosen... ho-hum.

Other good IC slutions are available. The TI XTR117 is simpler and a god deal cheaper. It should do the same job as your circuit.
 
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