"closed by default" transistor design?

Thread Starter

bmbouter

Joined May 29, 2021
75
I have an external switch connecting GND to RST on an 8266, it looks like this: [GND] ------ [normally open switch] -------- [8266 RST pin]. The ESP goes to sleep, and then the switch wakes it up. However while in operation I want this reset functionality disabled, but at a hardware level when the RST pin receives a GND signal it resets.

Ideally I'd have a component like a transistor that would always be closed/connected/on without any voltage or current applied to it. So that would be like [GND] ------ [normally open switch] ---- [new transistor] ---- [8266 RST pin]. Then when the reset functionality is to be disabled it applies 3.3V to the transistor's base and the switch "opens" instead of what I'm more familiar with where an NPN transistor "closes" when the voltage is applied to the base.

This project is battery powered and while sleeping the entire hardware takes < 22uA currently. Something on the order of uA to continuously run is tolerable, but the ideal would be to have a component that is just naturally closed/on and can be interrupted with a voltage. What would a component like that be?
 

Papabravo

Joined Feb 24, 2006
21,159
A depletion mode FET will provide that function. It takes an applied voltage to pinch off the channel. Would it be suitable for you application? I don't know.
 

Thread Starter

bmbouter

Joined May 29, 2021
75
Oh yes indeed that would work. I've been using N-channel enhancement mode mosfets in my other project so this makes sense.

Is there any way to do it with a transistor? The mosfet is about 5x more expensive than a PNP or NPN transistor. If not then that's fine, but I wanted to ask.
 

BobTPH

Joined Jun 5, 2013
8,813
Why not use a pin to output 0V when you want the switch enabled and 3.3V when you want it disabled. Then connect the switch between the RST pin and that output. Done, with no additional hardware.
 

Thread Starter

bmbouter

Joined May 29, 2021
75
It's a good question. I need an external hardware other than the 8266 because it'll be sleeping. I can only have it provide the 3.3v when it's awake. This is why I want the component to be naturally closed so that while the 8266 is sleeping it is in the closed state.
 

Thread Starter

bmbouter

Joined May 29, 2021
75
So the RST pin is held high, even when the micro is asleep. and you ground it to perform the reset?
Yes that's exactly how it works. The RST is an active low, so you activate it by pulling it low. Technically it resets on the subsequent rising edge after the active low is released.
 

crutschow

Joined Mar 14, 2008
34,285
So here's the LTspice simulation that, based upon my understanding, does what you want.
It use a P-MOSFET as a high side switch.
When the inhibit signal (yellow trace) at the MOSFET gate is at 3.3V, the MOSFET blocks the reset signal (green trace) when the switch connects to ground.
When the inhibit signal on the gate is low (or no signal), the MOSFET passes the reset signal (red trace).

C1 suppress the short glitches the MOSFET otherwise would generate when switching, due to capacitive coupling.

The P-MOSFET can be just about any logic level type (max Vgs(th) ≤ 2V).

So does that look okay?


1678838485943.png
 

Thread Starter

bmbouter

Joined May 29, 2021
75
Thank you all for the ideas. More ideas are always welcome too.

I rebuilt the LTSpice simulation and indeed I got the same results. That circuit I think does exactly what I need it to do!

I had been trying to come up with something using a PNP, but I couldn't. I chalked that up to me not knowing nearly what you all do, but it seems a P-MOSFET as a high side switch does more directly get at what I need.

I was also interested in the JFET option.

I'm also found this post https://www.reddit.com/r/AskElectronics/comments/6pqwh1/_/dkri51b which talks about a design that uses a normally open component like a MOSFET or transistor and then an inverter.

Basically I'm just learning more at this point. I think my needs are practically speaking already met by this (as usual) amazing community!
 

BobTPH

Joined Jun 5, 2013
8,813
It's a good question. I need an external hardware other than the 8266 because it'll be sleeping. I can only have it provide the 3.3v when it's awake. This is why I want the component to be naturally closed so that while the 8266 is sleeping it is in the closed state.
I do not know for sure about the 8266, but all micros I have used maintain their outputs when sleeping. Are you sure it cannot output high when sleeping?

Edited to add: And if it cannot output high, then make it an input and use a pull-up on RST.
 

crutschow

Joined Mar 14, 2008
34,285
I had been trying to come up with something using a PNP---
It can be done with a BJT but with an NPN:
That does invert the polarity of the inhibit signal, which now becomes an enable signal, and thus will use a few microamps while sleeping.
Edit: That could be reduced to a fraction of a microamp if two transistor are used in a Darlington configuration with a 10 megohm base resistor.
Also the NPN doesn't seem to generate the feedthrough spikes that the MOSFET did, so the filter capacitor on the output should not be needed.

1678892015635.png
 
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Thread Starter

bmbouter

Joined May 29, 2021
75
Thanks for the additional input!

I confirmed experimentally that the 8266 does not maintain any +3.3 GPIO lines while in deep sleep.

I also redrew the LTSpice npn model and got the same results. I'll have to use the p-channel one though because the 8266 cannot put out the enable signal while deep sleeping. But it can put out no signal which makes the p-channel the perfect option for me. Thank you!
 

Thread Starter

bmbouter

Joined May 29, 2021
75
Oh one last point. I've experimentally confirmed that the 8266 GPIO pin is actually floating (no connection), it's not ground it's just unconnected. Am I right in understanding that will work fine with the schematic from comment #8 because the pull down resistor R1 keeps the mosfet connected to an actual ground even when Inhibit is actually no connection?
 

crutschow

Joined Mar 14, 2008
34,285
the pull down resistor R1 keeps the mosfet connected to an actual ground even when Inhibit is actually no connection?
Yes.
But I'm confused.
If the GPIO input is floating then what is the input signal that will activate the processor, as I don't see any?
 

BobTPH

Joined Jun 5, 2013
8,813
Now In am confused. Do you want the RST enabled when sleeping or disabled when sleeping?

In either case, a pull-up or pull-down can set whichever level you want when sleeping and you can set the opposite level when not sleeping. Then you connect the switch to RST from the pin. You don’t need any additional hardware.
 
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