As you can see in the photo from LTSPICE and the graphs, I have tried to pass the voltage from P12 only when M12 signal is going from 0 to -12. However my Q1 is always conducting and Q3 is always conducting.Is there a way to close Q1 and Q3 when M12 is 0 and open Q1 and Q3 when M12 is -12V using a BJT logic?
Thanks.

 

Ask yourself what the base voltage on Q3 needs to be in order to turn it off.

Why are you complicating the voltage at the base of Q3 by involving P12 at all? Your verbal description only talks about wanting to have M12 affect things.

As your M12 voltage ranges from 0 V to -12 V, at what point do you want/need Q1 to turn on? Think about this in terms of acceptable limiting behavior, such as:

I cannot tolerate having Q1 turn on any time that M12 is higher than _____ .

I cannot tolerate having Q1 turn be turned off any time that M12 is lower than _____ .

This means that any value of M12 between these two voltages can result in Q1 being either on or off and that that is acceptable (and, of course, it means that the answer to the first question has to be more positive than the answer to the second).

The wider the gap between the two threshold, and the easier it is to design an acceptable circuit.

 

Why are you complicating the voltage at the base of Q3 by involving P12 at all?

With a maximum positive voltage for M12 of 0V to turn on Q3, how else would you do it?

 

It would certainly help if the TS could learn to be more precise with their descriptions. What does it mean that he only wants to pass the voltage P12 when M12 is "going from 0 V to -12 V". Does that mean the Q1 should be on only when M12 is transitioning between the two? Or only when it is at 0 V (or there abouts)? Or only when it is at -12 V (or there abouts)? What does he mean by Q1 and Q3 being "open" and "closed"? Open/closed like a switch (i.e., off/on), or open/closed like a valve (i.e., on/off)?

If he wants to involve P12 in the switching control logic, but yet P12 is changing (as his schematic implies), then he is going to have to specify the desired behavior for all possible combinations of P12 and M12 over their respective ranges.

If he wants the changes in behavior to occur close to 0 V, then things get trickier, but if the threshold can be further away, even by a volt or so, things get a lot easier.

There's no point spending a bunch of time trying to help him solve his problem until he does a better job describing just what is problem is, and what behavior constitutes an acceptable solution.

 

"Ask yourself what the base voltage on Q3 needs to be in order to turn it off."
-My Vbe needs to be lower then 0.6V.

"As your M12 voltage ranges from 0 V to -12 V, at what point do you want/need Q1 to turn on? Think about this in terms of acceptable limiting behavior, such as:"
I want Q1 and Q3 turn on at -12V and turn off at 0V.
Thanks.

Ask yourself what the base voltage on Q3 needs to be in order to turn it off.

Why are you complicating the voltage at the base of Q3 by involving P12 at all? Your verbal description only talks about wanting to have M12 affect things.

As your M12 voltage ranges from 0 V to -12 V, at what point do you want/need Q1 to turn on? Think about this in terms of acceptable limiting behavior, such as:

I cannot tolerate having Q1 turn on any time that M12 is higher than _____ .

I cannot tolerate having Q1 turn be turned off any time that M12 is lower than _____ .

This means that any value of M12 between these two voltages can result in Q1 being either on or off and that that is acceptable (and, of course, it means that the answer to the first question has to be more positive than the answer to the second).

The wider the gap between the two threshold, and the easier it is to design an acceptable circuit.

 

"Ask yourself what the base voltage on Q3 needs to be in order to turn it off."
-My Vbe needs to be lower then 0.6V.

So ask yourself what the voltage is in your circuit if P12 = 12 V and M12 = 0 V? Or if P12 = 12 V and M12 = -12 V?

Also, why do you say that Q3 is always conducting in your simulation?

Hint: Your load is an ideal capacitor. What would you expect to happen to an ideal capacitor's voltage when/if Q3 turns off?

"As your M12 voltage ranges from 0 V to -12 V, at what point do you want/need Q1 to turn on? Think about this in terms of acceptable limiting behavior, such as:"
I want Q1 and Q3 turn on at -12V and turn off at 0V.
Thanks.

So what is it supposed to be at -6 V?

At -0.01 V?

At -11.99 V?

 

What does it mean to “pass” a voltage? If the voltage “passed” is 0 volts, does that mean it can sink current to ground? How much current? What if the voltage “passed” is 1V and it is connected to an output that is at 6V? Does it sink current?

 

Hello WBahn,I have attached my LTSPICE file.
There is my big logical problem because I am biasing Q3 with Voltage divider of P12 and M12.
My P12 could be 0V and 12V.no matter what voltage P12 at i want Q3 closed when M12 is 0.
no matter what voltage P12 at i want Q3 open when M12 is -12V.
There is no way a voltage divider can do such a thing.
Is there alternative way to do it?
Thanks.

 

Draw a truth table of all combinations of P12 and M12 along with the desired voltage at Q1_c.

 

P12 has two states 0V and 12V
M12 has two state 0V and -12V

 

If the circuit must be powered only by the two inputs, which might be 0V, how is that supposed to work?

Also, with a 50K output impedance when the transistor is off, you cannot put much of a load on the outout.

Tell us what try are really trying to do. What is this output used for? What are the inputs?

Must the output source and / or sink current? How much?

 

P12 has two states 0V and 12V
M12 has two state 0V and -12V
Truth table shown below.
How can i implement it with BJT's?
Thanks.

 

Do you understand that 0V is different than no connection? Do you understand why supplying 12V through a 50K resistor is not the same as supplying 12V from a 12V regulated supply? Do you understand why we cannot give you an answer without more information?

 

Yes I understand .
But you understand what I am trying to implement ?
Could you give me an example of such circuit , a similar one I could learn the bjt logic ?
Thanks .

 

But you understand what I am trying to implement ?

No, not at all until you tell us how much current it needs to source and / or sink. If you understand that we need more information, why do you not supply it?

 

I wrote a specific state machine what else is needed ?

 

So is below what you want?:
I cleaned up your drawing to eliminate the random jogs and long wires, and connected Q3 in a grounded-base configuration to get the polarity you stated.

 

Hello crutschow,I am trying to improve the circuit you gave me to replace the delay between M12 and P12 and place a capacitor so Veb of Q1 will open a little later then M12 will come(M12 and P12 will come at the same time)
Is there some intuitions I could use?

I tried to use the following circuit as training and i put very large amount of capacitance as shown below.
Nothing slows down the rising rate of Veb.
What could be done?
LTSPICE file is attached.
Thanks.

 

So is below what you want?:
I cleaned up your drawing to eliminate the random jogs and long wires, and connected Q3 in a grounded-base configuration to get the polarity you stated.

View attachment 330624

The simulation does not show the states with Vin+ = 0.

 

I wrote a specific state machine what else is needed ?

OK, I’ll play. When your output is 0V, how much current must it sink? And what voltage is allowable at that current?