I have a circuit setup which causes the HV507 to output current spikes that exceed (Ex: 6mA) its threshold value (1mA), but the current RMS is much lower than what the system can tolerate. Additionally, the continuous power dissipation during this operation is within its threshold value. Is it ok to have the system operating as such, or do the current spikes need to be maintained within the max current threshold? I want to know this because I have to keep my output RMS high and for the setup I have, adding current limiting resistors significantly reduces the RMS.

 

Hi A,
Please post your circuit diagram, what are the HV outputs driving?
E

 

This is the circuit setup. Right now, I am using independent voltage sources to model the hv507 outputs. The top voltage sources produce a pulse swinging from 300v to 0v and the bottom one is also producing a pulse but phased 180 deg from the top pulses. Essentially, the capacitor faces a square wave swinging from 300v to -300v. This RC network is not what's actually going into the system but rather a model of something called an EWOD board. The capacitor represents the EWOD board and the resistor represents the liquid. The current spikes that the outputs undergo are very short but can be very high (the outputs going into the bottom output will be roughly 20). Is this something the chip can tolerate or not? What are some experiences you guys have had with such ICs, particularly the hv507. Also any tips for modeling the hv507 on LTspice, they dont seem to provide any models I can import into LTspice.