You are provided with a 230 V / 50 Hz ac supply, a 6-0-6 centre-tapped transformer and a
BJT of dc current gain 150. Biasing the transistor using a supply of 5.6 V (develop your
own), (i) design an amplifier of voltage gain 200; (ii) If this amplifier were to drive a load
of 75 Ω, what will be the gain of the amplifier ?; (iii) What should be the amplifier gain in
order to obtain an output of amplitude 100 mV for a sinusoidal input of amplitude 1 mV ?;
(iv) Simulate and verify all parts of the circuit. Use E96 series for your resistors.

So far, i have assumed that ic=1mA, and considered the circuit with no Re(only small signal resistance of 25mV/1mA=25 Ohms), but then RC when substituted in the gain formula, we obtain it as 5k Ohms and assuming 10*Ib flows through R2 of voltage divider biasing configuration I ended up getting R2=10.5k Ohms and R1=66.818k Ohms, but then when the circuit is tested using simulation, it falls into saturation region.

This is the output I got when simulated the below ckt, the transistor is in saturation region Vce<0.3V

This is the circuit I simulated:

 

hi techy.
Welcome to AAC.
Please post your LTS asc file.
E

 

hi techy.
Welcome to AAC.
Please post your LTS asc file.
E

 

Hi techy,
The asc file you posted does not match the circuit in post #1
E

 

"So far, i have assumed that ic=1mA, and considered the circuit with no Re(only small signal resistance of 25mV/1mA=25 Ohms), but then RC when substituted in the gain formula, we obtain it as 5k Ohms and assuming 10*Ib flows through R2 of voltage divider biasing configuration I ended up getting R2=10.5k Ohms and R1=66.818k Ohms, but then when the circuit is tested using simulation, it falls into saturation region."

* Please note that the "small-signal resistance of 25 Ohms" plays a completely other role as the ohmic resistor Re in the emitter path. It is not a resistor at all and it does not belong to the emitter region. Unfortunately and surprisingly, some authors think that it would be helpful to model the transconductance gm [gm,=d(Ic)/d(Vbe)] as a quantity re=1/gm , which I consider as misleading.

* When the collector current is Ic=1mA the voltage drop at a collector resistor Rc=5k will be 5 Volts, That means: With a supply voltage of Vcc=5.6 volts, the transistor will be in saturation. Is this your design goal ?

 

"So far, i have assumed that ic=1mA, and considered the circuit with no Re(only small signal resistance of 25mV/1mA=25 Ohms), but then RC when substituted in the gain formula, we obtain it as 5k Ohms and assuming 10*Ib flows through R2 of voltage divider biasing configuration I ended up getting R2=10.5k Ohms and R1=66.818k Ohms, but then when the circuit is tested using simulation, it falls into saturation region."

* Please note that the "small-signal resistance of 25 Ohms" plays a completely other role as the ohmic resistor Re in the emitter path. It is not a resistor at all and it does not belong to the emitter region. Unfortunately and surprisingly, some authors think that it would be helpful to model the transconductance gm [gm,=d(Ic)/d(Vbe)] as a quantity re=1/gm , which I consider as misleading.

* When the collector current is Ic=1mA the voltage drop at a collector resistor Rc=5k will be 5 Volts, That means: With a supply voltage of Vcc=5.6 volts, the transistor will be in saturation. Is this your design goal ?

Thank you for taking time in answering this question.
My goal was to bias the bjt in active region which gives a Gain of 200

 

Hi techy,
The asc file you posted does not match the circuit in post #1
E

Sorry for the confusion in earlier file and i thank you for being kind in informing me about it, will attach the updated file here

 

What if you were given the following circuit to analyze:



You are given that the voltage coming in at the top is 5.6 V and that the beta of the transistor is 150.

What would you expect the voltage at the collector to be?

What would you expect the currents in each resistor and the current in the transistor base to be?