Hello everyone,

I am currently working on a 4-bit Two-Step Flash ADC in LTspice for a university project.

The architecture includes:

• Sample-and-Hold
• Coarse ADC
• DAC
• Residue amplifier
• Second Sample-and-Hold
• Fine ADC
• D Flip-Flops for synchronization

The ADC is working, but I am experiencing glitches on some output bits and occasional code transition errors.

I would appreciate advice on the following points:

1. CMOS models:
   • Which NMOS and PMOS models do you recommend for a CMOS implementation of a Two-Step Flash ADC in LTspice?
   • Are there any reliable models or libraries commonly used for ADC design and academic projects?
2. Clocking:
   • How should the clocks be distributed between the Sample-and-Hold stages, ADC stages, and DFFs?
   • Should all blocks use the same clock or multiple clock phases?
   • How do you determine the required delay between the coarse conversion stage and the fine conversion stage?
3. Glitches:
   • What are the most common causes of glitches in a Two-Step Flash ADC?
   • Have you encountered synchronization problems between coarse and fine conversion outputs?
   • What techniques are typically used to eliminate these glitches?

Any recommendations, examples, references, or LTspice projects would be greatly appreciated.

Thank you.

 

Hi Raph,
Welcome to AAC.
Please post your LTSpice asc file and any associated models.
E

 

https://drive.google.com/drive/folders/19mbr6joYBY9NFJ6kHN5kXdAXvVb2hHJj?usp=sharing


Hello,

The project files are quite large, so I uploaded them to Google Drive instead of attaching them directly.

The main file is ADC4bits.asc (ADC4bits), which contains the complete top-level design of the 4-bit Two-Step Flash ADC. The other files are supporting blocks used by the main schematic.

Here is the Google Drive link:
[Paste your Google Drive link here]

Thank you for taking the time to look at the project. Any advice regarding the CMOS models, clocking strategy, synchronization, or the glitches I am observing would be greatly appreciated.

 

Hi Raph,
That's a lot of files, is it possible you could post a zipped folder of those files to this Thread.
E

 

https://drive.google.com/drive/folders/1rYn8A0QwpfrtSkoWKTorEW7PhOFlE_rk?usp=sharing

 

Is your logic fully-synchronous? If not, that is a very common source of glitches.