A circuit that can detect the width and output the pulse

crutschow

Joined Mar 14, 2008
30,766
5ns is a very short time.
What accuracy do you need?

To do that you would have to delay the pulse for at least 5ns if you want the full pulse-width, since you can't go back in time.
Or accept a truncation of the first 5ns of the pulse as MS stated.
 
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WBahn

Joined Mar 31, 2012
27,389
A digital logic gate has a minimum pulse width that it will respond to; pulses shorter than that simply disappear, while pulses longer than that appear at the output delayed, but pretty much their full width. There's a name for this, but I can't remember what it is. If you are designing the logic gate, you can tailor this to whatever you want (within reason). It's usually on the order of the propagation delay, but the mechanisms aren't quite the same. Also, there's a smearing effect right at the limit where pulses come through, but are shortened and not full-height.

If you can accept the pulses being shortened by 5 ns (and pulses less than 5 ns being eliminated), then just put the pulse and a copy of it delayed by 5 ns into an AND gate.

Expecting a drastic change in behavior, namely a 4.9 ns pulse producing no output but a 5.1 ns pulse producing a 5.1 ns output, is going to be hard to achieve (unless you have a REALLY high speed digital system that can be respond fast enough to run a state machine in which the output of the AND gate I mentioned sets a latch that is then OR'ed with the delayed signal, with the delayed signal signal going LO used to reset the latch.
 
If your pulse is always with the same amplitude, you can make a circuit, which charges a capacitor with triggering this signal, and the circuit will de-charge the capacitor in longer time than charging. The more pulse width, the more charging of capacitor. Then you can calculate the discharge time (or maximum charged voltage of capacitor) that related to pulse width.
 

Ramussons

Joined May 3, 2013
1,316
Quite simple.
You have a counter and a 10 GHz clock. This is for a 0.1 nS resolution.
The Pulse in question enables the counter.
If the count is less than 50, NoGo.
If 50 or more, Go.
Now, how you implement this is a Mystery to me :rolleyes:
 

WBahn

Joined Mar 31, 2012
27,389
If your pulse is always with the same amplitude, you can make a circuit, which charges a capacitor with triggering this signal, and the circuit will de-charge the capacitor in longer time than charging. The more pulse width, the more charging of capacitor. Then you can calculate the discharge time (or maximum charged voltage of capacitor) that related to pulse width.
A lot of issues with this approach. If the decharging time is longer than the charging time, then pulses will get stretched. Also, there is a limit to how much the capacitor can be charged to, which means that pulses that would need to exceed that voltage will all end up being the same length. On top of that, how do you discharge the capacitor for pulses that are too short to reach your triggering threshold?
 

ƎLECTRON

Joined Jan 8, 2022
2
If the decharging time is longer than the charging time, then pulses will get stretched
The output pulses must be stretched to be within the our measurement range.

how do you discharge the capacitor for pulses that are too short to reach your triggering threshold?
The capacitor is not connected to the pulse directly and located on the output side of the circuit. This output side has different discharge time constant with it's resistor that we can set it to desire value.
 
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