10-second count down timer needed"

Thread Starter

LASERSC

Joined Oct 11, 2010
12
I need help creating a countdown circuit. I want to have a switch that when is turned on will start a countdown from 10 seconds and when hitting zero it will energize a 120v relay circuit turning on a light. Which will remain on till switched off. I am wanting to simulate a countdown to rocket launch for a Christmas present for my son. I have just enough knowledge to get into trouble.
 

dl324

Joined Mar 30, 2015
16,679
1 second astable (555 timer), BCD down counter (CD4029), BCD to 7 segment decoder (CD4511), 7 segment display, start/off switches, and some glue logic, resistors, and capacitors.
 

MrChips

Joined Oct 2, 2009
30,476
I need help creating a countdown circuit. I want to have a switch that when is turned on will start a countdown from 10 seconds and when hitting zero it will energize a 120v relay circuit turning on a light. Which will remain on till switched off. I am wanting to simulate a countdown to rocket launch for a Christmas present for my son. I have just enough knowledge to get into trouble.
A thread title such as "Desperate Help Needed" helps nobody. A better title would be "10-second count down timer needed".
 

dl324

Joined Mar 30, 2015
16,679
10 complicates things, you'll need two BCD counters, and 2 7 segment displays. If you count down from 9, you don't need them.

Using an Arduino Uno would be easier, but here's a schematic for 9-0.
1701564780998.png
I've only walked through the circuit once, so there may be issues. You could probably replace the CD4013 with some of the extra inverters in the CD4069.

If you really want 10...0, CD4029 are easy to cascade.
 

Thread Starter

LASERSC

Joined Oct 11, 2010
12
10 complicates things, you'll need two BCD counters, and 2 7 segment displays. If you count down from 9, you don't need them.

Using an Arduino Uno would be easier, but here's a schematic for 9-0.
View attachment 308941
I've only walked through the circuit once, so there may be issues. You could probably replace the CD4013 with some of the extra inverters in the CD4069.

If you really want 10...0, CD4029 are easy to cascade.
Thank you so much for your quick response I do really appreciate. Counting down from 9 and below will work just fine. Thank you again!
 

AnalogKid

Joined Aug 1, 2013
10,944
https://www.ti.com/lit/ds/symlink/cd40110b.pdf

This can replace IC1 and IC2 in post #4. Unfortunately, the borrow output is different from that in the CD4029, so the logic that freezes the count at "0" will change. This can be done with two NAND gates instead of IC4. The other two NAND gates can replace the IC5 flipflop. Now we're down to 3 chips total.

But wait, there's more . . .

With a different arrangement of the NAND gates, and using Schmitt Trigger gates such as the CD4093, one of the gates can be the oscillator. Now we're down to only two chips.

One gate is the oscillator.

Two gates decode a segment pattern that equates to a "0", and inhibits the oscillator.

One pushbutton forces the oscillator to run when locked up in the "0" state.

One gate debounces the switch.

There is no control flipflop. That is implemented by gating the clock oscillator based on the segment outputs.

Schematic later.

ak
 
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dl324

Joined Mar 30, 2015
16,679
The ST HCF40110B is an up or down counter with 7 segment driver in one IC. There may be others?
I have a bias for CD4029 because I bought 100 the last time I bought counters. It's BCD/binary, up/down, with preset and clear so it was the most versatile for me. Plus, I have hundreds of 74HC4511 that I bought from an inventory liquidation years ago.

When I was learning about capabilities with CMOS IC's, CD40110 never caught my attention because it didn't exist (from RCA or Motorola). I never made much of an effort to learn what existed after I changed my career path. I became aware of CD40110 on AAC. It can count down, as the OP desires, but it doesn't have preset capabilities.
 
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eetech00

Joined Jun 8, 2013
3,820
I think the display sequence should initialize to 0 (or 00).
When start button is pressed, display sets to 9 (or 10 with two displays), and begins count down.
Then halts at 0 (or 00)

Power reset (or reset button) starts sequence over.
 
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AnalogKid

Joined Aug 1, 2013
10,944
First pass at a 40110-based schematic. Note the original RCA font in the datasheet.

This circuit powers up reset to "0", and sits waiting for a button press. Hold the button for one count to clear the latch and let the oscillator run.

U2C-R1-C1 is the oscillator. Those components should run a little faster than 1 Hz. Add a trimpot in series with R1 to get adjustability.

R1-C2 create a short delay between the display outputs changing state and possibly inhibiting the oscillator. The concern here is that there might be sub-microsecond blips on the display outputs when changing numbers, invisible to the eye but very visible to the gating logic. R2-C2 inserts a 50 ms delay to let things settle down to a stable state before affecting the oscillator. The time constant is relatively long for that function because they also debounce the start switch.

Neither the Carry nor Borrow outputs pulse at the right time for our needs, so the "0" display is decoded directly from the segment drives and used to freeze the oscillator. The G output is high for all numbers except 0, 1, and 7, so that rules out the other seven possible states when it is low. The F output is low for both 1 and 7, so that rules both of those states when it is high. U2A and U2B decode this into a control signal that is high when numbers 1 through 9 are displayed, allowing the oscillator to run, and low to freeze the oscillator in the 0 state. Using the segment outputs to inhibit the input clock oscillator is the feedback needed to create the latch function.

R3-C3 holds the Reset input high for approx. 50 ms, to assure that the circuit powers up in a known state.

U2D is an unused gate with its inputs terminated.

RN1 can be replaced by 7 individual resistors.

ak


Countdown-Display-1-c.gif
 
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eetech00

Joined Jun 8, 2013
3,820
First pass at a 40110-based schematic. Note the original RCA font in the datasheet.

This circuit powers up reset to "0", and sits waiting for a button press. Hold the button for one count to clear the latch and let the oscillator run.

U2C-R1-C1 is the oscillator. Those components should run a little faster than 1 Hz. Add a trimpot in series with R1 to get adjustability.

R1-C2 create a short delay between the display outputs changing state and possibly inhibiting the oscillator. The concern here is that there might be sub-microsecond blips on the display outputs when changing numbers, invisible to the eye but very visible to the gating logic. R2-C2 inserts a 50 ms delay to let things settle down to a stable state before affecting the oscillator. The time constant is relatively long for that function because they also debounce the start switch.

Neither the Carry nor Borrow outputs pulse at the right time for our needs, so the "0" display is decoded directly from the segment drives and used to freeze the oscillator. The G output is high for all numbers except 0, 1, and 7, so that rules out the other seven possible states when it is low. The F output is low for both 1 and 7, so that rules both of those states when it is high. U2A and U2B decode this into a control signal that is high when numbers 1 through 9 are displayed, allowing the oscillator to run, and low to freeze the oscillator in the 0 state. Using the segment outputs to inhibit the input clock oscillator is the feedback needed to create the latch function.

R3-C3 holds the Reset input high for approx. 50 ms, to assure that the circuit powers up in a known state.

U2D is an unused gate with its inputs terminated.

RN1 can be replaced by 7 individual resistors.

ak


View attachment 309011
Somewhere in this thread, the down count morphed to 9-0 when the TS actually asked for 10-0.
:confused:
 

AnalogKid

Joined Aug 1, 2013
10,944
Re-reading things, I lost sight of the lamp drive output. Here is an update to #13 that includes a relay for the light bulb.

The spare gate U3D is used to drive a relay, but the operation is slightly different than originally requested. On power-up, the light is on and the display is static at 0. Pressing the button turns off the light and starts the countdown from 9. When the display hits 0 again, the light comes on and the system freezes until another button push.

Of course there is a way for the light *not* to be on at power-up, but coming on when the display counts down to 0 and freezes. That gets us back to three chips.

ak

Countdown-Display-2-c.gif
 
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eetech00

Joined Jun 8, 2013
3,820
First pass at a 40110-based schematic. Note the original RCA font in the datasheet.

This circuit powers up reset to "0", and sits waiting for a button press. Hold the button for one count to clear the latch and let the oscillator run.

U2C-R1-C1 is the oscillator. Those components should run a little faster than 1 Hz. Add a trimpot in series with R1 to get adjustability.

R1-C2 create a short delay between the display outputs changing state and possibly inhibiting the oscillator. The concern here is that there might be sub-microsecond blips on the display outputs when changing numbers, invisible to the eye but very visible to the gating logic. R2-C2 inserts a 50 ms delay to let things settle down to a stable state before affecting the oscillator. The time constant is relatively long for that function because they also debounce the start switch.

Neither the Carry nor Borrow outputs pulse at the right time for our needs, so the "0" display is decoded directly from the segment drives and used to freeze the oscillator. The G output is high for all numbers except 0, 1, and 7, so that rules out the other seven possible states when it is low. The F output is low for both 1 and 7, so that rules both of those states when it is high. U2A and U2B decode this into a control signal that is high when numbers 1 through 9 are displayed, allowing the oscillator to run, and low to freeze the oscillator in the 0 state. Using the segment outputs to inhibit the input clock oscillator is the feedback needed to create the latch function.

R3-C3 holds the Reset input high for approx. 50 ms, to assure that the circuit powers up in a known state.

U2D is an unused gate with its inputs terminated.

RN1 can be replaced by 7 individual resistors.

ak


View attachment 309011
Hi Ak

Here is a simulation of your circuit ( on Proteus).
Looks like a slight time skip when transitioning from 9 to 8 after pressing button.
See animation below . VDD=9v, red square is logic high, blue is logic low.

Count Down Timer with CD40110-1.gif
 

AnalogKid

Joined Aug 1, 2013
10,944
Looks like a slight time skip when transitioning from 9 to 8 after pressing button.
When the oscillator is gated off, the U1A output sits high. Immediately upon a button press, that output goes low for a bit longer than 1/2 cycle, then high. That positive edge clocks the 40110, so the first clock edge after a button press is a little longer than 1/2 of a normal cycle. It is a bit longer than 1/2 because timing cap C1 is fully charged to Vcc, so it has to discharge from Vcc down to the 4093 lower transition level. In a normal cycle, the cap discharges only from the upper transition level, which is less than Vcc, to the lower transition level, and this takes less time.

The result of this should be a less-than-one-full-cycle delay between pressing the button and advancing from 0 to 9, and no timing irregularities after that.

When the button is pressed, there is a logic level bounce on U1 pin 1. Is that a simulation artifact?

Increase the button press time to one full second and lets see if that clears up things.

ak
 
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