vhdl

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  1. salhi

    Design of a parking management system

    The goal of our system is to manage the availability of parking spaces. This system has 4 input signals (mode in): the entry-exit captures of type std_logic, the clock, and the maximum number of spaces in the parking lot (4-bit binary word of type std_logic_vector). The sensor inputs are used to...
  2. itskrish

    test bench code

    hi this is my vlsi term project (stop watch) can anyone help me generating the test bench code in vhdl
  3. M

    SPI EEPROM 25LC1024 VHDL question

    Hi to all, I wrote a code for read a 25LC1024 EEPROM (Datasheet). I use this code: -- THIS IS THE VHDL CODE FOR READ 25LC1024 EEPROM. -- CLAUDIO LA ROSA LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_arith.all; USE ieee.std_logic_unsigned.all; ENTITY EEPROM25LC1024 IS PORT(...
  4. omarnossa7

    VHDL Code, when I try to simulate it, the signals does not work, losses, show a orange color

    [Simulation error](https://i.stack.imgur.com/5bPNK.png) Im using a Nexys 3 Spartan 6 Lower Power XC6SLX16L the idea of the program is with a timer counter with specific conditions with the bottoms Here is my code: ``` library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.NUMERIC_STD.ALL...
  5. stryker1803

    Created a project for my Zybo Z7 - 7010 but it wont work.

    Hello guys, This last week I've been learning VHDL using Vivado and a Zybo Z7 I bought. I created an Altitude simulator. It uses LEDS, Buttons and PMOD Double Seven Segment. After I created the code and run it using a tb I decided to upload it into the board but is not working. I'm new to this...
  6. mojaha

    divide two 64bit number to a result float number

    I want to divide two 64 bit number and the result will be a float number How I can do this by VHDL?
  7. Swaysceptile

    Trouble simulating the output for a VHDL design code

    A VHDL design code for a remote-controlled garage door opener with sensors is provided to us. It has 8 states, 4 for each door. Testbench is not provided, and I did one (with the help of a testbench generator as well). The output should look something like this: ] I used web application...
  8. xaxxa

    testing on a virutal FPGA

    Hello, I'm trying to learn how to code in VHDL. I already have some basis I learned from school and I want to improve my knowledge in this field. I was wondering if there is any way to test my code on a kind of virtual FPGA. Is there any website or software that allows you to test your code as...
  9. T

    has anyone installed TerosHDL on his VS code on Widwons Subystem Linux?

    I am looking froward on how to install TerosHDL since it looks promising for VHDL programming which includes visual representation of the modules which helps me a lot. does anyone has experience on installing it since I am bit lost on the website step by step instructions? TerosHDL
  10. Adrienboub

    Code for put number on LCD 4 bits from an input of 32 bits (clk 50MHz)

    Hello, I share my VHDL code for put number of 4 bit on the LCD-4bit of the virtex-6. The input is a biggest numer of 32bit. One state machine for display and another for transmission. ------------------------------------------------------------------------------------------ library IEEE; use...
  11. J

    Issue implementing counter in VHDL

    Hi everyone, I have just started using VHDL and I am trying to understand a piece of code I code I was handed. The counter must count up to 0xBEBC200 (which is equal to 200,000,000) and whenever there is a change in the clock signal, the program will enter the process statement to assess wether...
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