Why polygons on solder layers aren't removing solder-mask at the board edges ?

Thread Starter

Younes Thabet

Joined Jan 9, 2019
Hello all,

I made a polygon on the top and bottom solder layer that goes to the end of the board (actually even beyond).
but as you can see in the below image there is still a little bit of solder mask on the board edges! is this normal or something wrong?
Is it gonna look like this in the PCB when it gets from the manufacturer?



Thread Starter

Younes Thabet

Joined Jan 9, 2019
The board house, (and CAD program) will not take coper to the edge. They typically stop the copper just short of the edge.
@Jon Chandler No, i am not talking about silkscreen.
@ronsimpson I know about copper-to-board edge clearance but I am talking about solder-mask (solder resist).
I made a polygon in the solder layer (which is a negative layer) so that I don't get the green color in that specific area. The polygon goes beyond the board edge but as you can see in the attached image there is some green color on the edge!?



Joined Sep 22, 2009
If you are trying to keep copper out of an area, using the Keep Out layer might be better. Draw your area using a place line command on that layer. That will keep any other tracks/ground plane away in that area.
I think the green bit at the edge is actually the 3D representation of the PCB itself, possibly some rule is not letting your track get to the edge.

Jon Chandler

Joined Jun 12, 2008
Gerber files are one layer per file. The soldermask layers are inverse – the colored areas are where soldermask isn't.

The board is built from these files only, so what you see is what you get.

Gerbv is a great free Gerber viewer.