is it a good idea to stitch 4 copper polygons together to increase current capabilities?

Thread Starter

BrokenPin

Joined Oct 1, 2023
11
Hi all,

I have a 4-layer PCB with a below layer-stack and I will be having a net that is supposed to handle 100A. I know I should use a heavy copper PCB instead of this 4-layer PCB but to save cost I stitched 4 polygons on all layers with (0.5 hole size, 1 diameter) vias to accommodate the high current.

Screenshot 2024-02-12 190124.png

According to a conductor width calculator, the width of the conductor should be more than 10 cm for a 25 mm long trace to be able to handle that amount of current but of course that's impractical in my case so I used roughly 13 mm thick polygons in all 4 layers and stitched them together...
I even added jumper links and some pads (to be filled with solder mountain) on the external layers just in case the PCB can't handle the current.

Now, my questions are :
Is this a good idea for a <50khz, 100A signal? or is there a better approach?
I used 1:2 and 3:4 blind vias to stitch the layers 1/2 and 3/4 together and opted not to use 2:3 buried vias to not increase the price even more...is this ok? meaning not stitching layers 2 and 3?

Thanks,
 

BobTPH

Joined Jun 5, 2013
9,149
It would be best not to route the 100A power through the PCB. But if you must, one technique is to solder piece of thick copper wire (or even bus bar) over the trace.
 

Thread Starter

BrokenPin

Joined Oct 1, 2023
11
It would be best not to route the 100A power through the PCB. But if you must, one technique is to solder piece of thick copper wire (or even bus bar) over the trace.
I used some jumper links (each can support up to 20A) as depicted in the below image.
Screenshot 2024-02-12 211625.png


And also I used some pads that I can solder some wires to thicken the trace ..
Screenshot 2024-02-12 212035.png
 

ronsimpson

Joined Oct 7, 2019
3,144
Many times, I have used most or all layers to reduce the resistance of the copper.

I copied an example from post #3. I added red dots. Make footprints with vias in the part. Example the bolt holes to the right side can have extra holes through the part picking up all layers.
Because of cost I do not use buried vias.
Because my switchers are below 1mhz I do not see the need to add vias every 2mm. I do add some by hand in open areas but usually I just use the extra vias on each end, or where it is easy to add.
I use heavy copper even on the inter layers.
Back when I worked for Samsung we stripped off the solder mask and built-up thick layers of solder to increase the metal. It only helps a little, and is not done much anymore.
Manufacturing hates me for putting vias in the pads of MOSFETs. But we do that to carry the heat away and so I also do that to carry the current away. It works.
1707762880793.png
 

Thread Starter

BrokenPin

Joined Oct 1, 2023
11
Many times, I have used most or all layers to reduce the resistance of the copper.

I copied an example from post #3. I added red dots. Make footprints with vias in the part. Example the bolt holes to the right side can have extra holes through the part picking up all layers.
Because of cost I do not use buried vias.
Because my switchers are below 1mhz I do not see the need to add vias every 2mm. I do add some by hand in open areas but usually I just use the extra vias on each end, or where it is easy to add.
I use heavy copper even on the inter layers.
Back when I worked for Samsung we stripped off the solder mask and built-up thick layers of solder to increase the metal. It only helps a little, and is not done much anymore.
Manufacturing hates me for putting vias in the pads of MOSFETs. But we do that to carry the heat away and so I also do that to carry the current away. It works.
View attachment 315082
Thanks for the valuable suggestions..
Is it ok to use like 5oz on bottom layer to carry most current and maybe 2 or 1oz on top and internal layers .. I have done 2 on outer layer before and PCB house said something about PCB layers must be symmetrical..
Also, I have seen some designs where they strip the soldermask over the copper polygons ..is it done to provide cooling!?
 

ronsimpson

Joined Oct 7, 2019
3,144
I have only used copper thickness where the two outside layers are the same. The inside layers are 1/2 as thick or the same thickness. I think a PCB house can do anything but that does not mean they will, or you can afford it.

strip the soldermask over the copper polygons ..is it done to provide cooling
My Japan, Korea and China power supplies have this on all high current traces. We did some tests, the resistance is reduced a small amount, and the surface area goes up, and the insulating effect of the silkscreen is gone. I think each only helps a small amount. Effect-1 X effect-2 X effect-3 = total effect.
 
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