# why in this article baud rate is considered as bit period or bit rate?

#### TarikElec

Joined Oct 17, 2019
99
1-first question:
in this article baude rate/bit period, how can he takes the bit period as the baud rate. in my understanding, bit rate=(1/bit period) = baude rate* number of bits in 1 baud.

The bit period for the Tx device is defined as follows:

TTX=1/baudrate​

2-second question: what is the relation between clock frequency and baude rate?

#### Delta Prime

Joined Nov 15, 2019
1,311
Hello there welcome to AAC

#### TarikElec

Joined Oct 17, 2019
99
Hello there welcome to AAC

View attachment 224456
Now, I understand the relation between the baudrate and bit rate. what about the second question, does it mean that the signal has a 16bits?

#### jpanhalt

Joined Jan 18, 2008
11,087
From Wikipedia (https://en.wikipedia.org/wiki/Baud ):
It is the unit for symbol rate or modulation rate in symbols per second or pulses per second. It is the number of distinct symbol changes (signaling events) made to the transmission medium per second in a digitally modulated signal or a bd rate line code. <snip>
The symbol rate is related to gross bit rate expressed in bit/s. The term baud has sometimes incorrectly been used to mean bit rate,[

#### BobaMosfet

Joined Jul 1, 2009
2,082

#### MrChips

Joined Oct 2, 2009
29,255
As pointed out above, baud and bit rate are two different things.
For most situations that you will encounter, such as UART protocol, baud and bit rate have the same numerical value.

In the UART receiver, the data is clocked in the middle of the bit. How would the receiver determine where is the middle?
In order to do this, the receiver uses a clock frequency that is 16 times the baud.
For example, if baud = 9600, the clock frequency is 9600 x 16 = 153,600 Hz.
(Note that you cannot generate this frequency exactly from an 8MHz crystal oscillator. There is a small error.)

The receiver circuitry is triggered from the leading edge of the START bit.
The START bit is sampled 8 clock cycles from the leading edge.
Subsequent bits are sampled 16 clock cycles thereafter.

#### MIS42N

Joined Jan 25, 2013
22
All the above assumes a UART receiver. The relationship between the clock frequency of the processor and the timing requirements of the UART will be described in the DataSheet of the processor. Not all UARTs use a x16 clock, I have seen a x64. And it is not necessary to sample the start bit half a bit in, it is still the start bit. The first necessary sample is taken 1-1/2 bit times after the start bit transition. I am using software to emulate a UART, it uses a timer and interrupt on change. On any IOC the timer is set for 1-1/2 bit times, if the timer expires it is set to 1 bit times. Works OK.