Why have a latch in-circuit if it's wired like this?

Thread Starter

metermannd

Joined Oct 25, 2020
281
I have this 74LS375 latch in this circuit, but the way it's wired up, it makes no sense to me.

Attached is the IC as it's currently wired up, the equivalent circuit from the datasheet, and the logic equivalent of permanently tying the latch enable line to 5V.

I don't get it. It's just the clock signal to the 8279 display / keyboard driver. The ClkE signal is just the master clock after it's passed through the buffer from the logic board, and the Clk signal proceeds directly from there into the 8279.

If I just needed a bit more propagation delay for whatever reason, I have half of a 74LS241 buffer IC sitting idle... couldn't I just feed this signal through there?
 

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Deleted member 115935

Joined Dec 31, 1969
0
it could just be there as a buffer if it had parts free , or even to aid routing !

Also , as a rule, don't believe the data sheet of the logic diagram of a chip
at best its a highly Stylised, at worst its plane wrong.

Even these simple chips probably have calculated delays to ensure the gates work
 

Thread Starter

metermannd

Joined Oct 25, 2020
281
...Also , as a rule, don't believe the data sheet of the logic diagram of a chip
at best its a highly Stylised, at worst its plane wrong...
You DO have a good point... trade secrets and all that.

I'm now inclined to think it's just there for the delay... will have to compare datasheets and see if it's feasible to swap for the '241.
 

Deleted member 115935

Joined Dec 31, 1969
0
If you have the original schematic , there might be a note on there,
I tend to do that ,
but a lot of published schematics are made to a company standard, and all useful info is removed.
 
There might be more information on the chip in Texas Instrument's The TTL Data Book - Vol.2, 1985 - this is the detailed description of standard, LS, and related types. Probably available at a library, or at archive.org.
 
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