hi
how to generate SR waveform from the given output mean q. If Q is given then how to generate S and R . I find Q' but i don't known how to find S and R from the Q and Q'?

 

not sure if i understand the question... but

S and R are inputs of the flip-flop. The levels on those inputs will determine your Q and Q' so if you know Q, you can figure out which inputs on S and R will result in that output. You can work it out through the diagram

also check this out http://www.olemiss.edu/courses/EE/ELE_335/Spring2000/Htmlnotes/DJKTFlipFlops/sld002.htm

 

i have definition
Draw a set of waveform for S and R and X and X' so that the flip flop will have the output signals 0011010 on the output line.

Above is definition now i know output means X so i can draw waveform for X from the X i can also draw X' but how can i draw S and R waveform?

 

i have definition
Draw a set of waveform for S and R and X and X' so that the flip flop will have the output signals 0011010 on the output line.

Above is definition now i know output means X so i can draw waveform for X from the X i can also draw X' but how can i draw S and R waveform?

I believe if you understand the truth table for SR, hence you know how to done it

S | R | X
0 | 0 | Unchaged
0 | 1 | 0-reset
1 | 0 | 1-set
1 | 1 | Invalid

this was the truth table for SR Flip flop (FF) but no borders XP. So How we can get the answer from it? By looking at the output X at question given and compare with output from truth table , you will get both inputs. Example: output X=1 will get input S=1 and R=0. You got the point? it was as piece of cake, man.

 

or ask yourself a question - what condition do I need to set the flip-flop (X=1)? Looking at the truth table, flip flop is set when S=1 and R=0. What do you need to reset it?

 

aha! I got an idea how to remember this SR flip-flop truth table

Imagine S=set while R=reset just like a logic swich

When S=1 while R=0 you will got the logic output 1 (set condition)

when S=0 while R=1 you will get logic output 0 (reset condition)

Hence when you made both S and R equal to logic 1, your SR ff may gone crazy or in other words, prohibited

while both S and R at logic 0, SR ff not change or disturb the current output or in other words unchanged

 

I have prepare waveform plz check is it write?

 

I have prepare waveform plz check it.

 

looks fine. Just double check with SR truth table when uncertain.

 

Yeah, no problem at all

 

K thanks but in textbook ans is differ than i have prepared.Ans of book is created in the attachment. so if possible give me proper difference.

 

Where the values of X (and hence X') do not change from the previous period, there is no need to assert the inputs again... There is one case in the truth table where the output is equal to the previous state.

 

The text is right, and your answer is right. In this case it is not necessary to use 0/0 (like djsfantasi pointed out above). This combination becomes important when you are using clocked flip-flops and are trying to sort out how the signals align with the clock. Hope this helps.

 

I have attach file in that my ans is differ than given in textbook. so tell me i m wrong a right?

 

if you look carefully at the truth table, you should realize that they accomplish the same thing... examine what S=0 and R=0 does to the output

 

i can't understand what r u saying

 

lets try this...

 

thanks a lot i understand as u said . thank u . if q=1110000011 then s=1000000010 and r=0001000000 is it write?
as u said i try this new example. i am just checking as i understand is right?

 

looks like you got it

 

but in the book it will be s=1000000010 r=0001001000 x=1110000011 x'=0001111100
S , x and x' are same but there is some changes in R