# Waveform in SR flip flop

#### CSharpque

Joined Sep 23, 2011
40
hi
how to generate SR waveform from the given output mean q. If Q is given then how to generate S and R . I find Q' but i don't known how to find S and R from the Q and Q'?

#### justtrying

Joined Mar 9, 2011
439

#### CSharpque

Joined Sep 23, 2011
40
i have definition
Draw a set of waveform for S and R and X and X' so that the flip flop will have the output signals 0011010 on the output line.

Above is definition now i know output means X so i can draw waveform for X from the X i can also draw X' but how can i draw S and R waveform?

#### mangyver5223

Joined Oct 22, 2011
17
i have definition
Draw a set of waveform for S and R and X and X' so that the flip flop will have the output signals 0011010 on the output line.

Above is definition now i know output means X so i can draw waveform for X from the X i can also draw X' but how can i draw S and R waveform?
I believe if you understand the truth table for SR, hence you know how to done it S | R | X
0 | 0 | Unchaged
0 | 1 | 0-reset
1 | 0 | 1-set
1 | 1 | Invalid

this was the truth table for SR Flip flop (FF) but no borders XP. So How we can get the answer from it? By looking at the output X at question given and compare with output from truth table , you will get both inputs. Example: output X=1 will get input S=1 and R=0. You got the point? it was as piece of cake, man. Last edited:

#### justtrying

Joined Mar 9, 2011
439
or ask yourself a question - what condition do I need to set the flip-flop (X=1)? Looking at the truth table, flip flop is set when S=1 and R=0. What do you need to reset it?

• mangyver5223

#### mangyver5223

Joined Oct 22, 2011
17
aha! I got an idea how to remember this SR flip-flop truth table Imagine S=set while R=reset just like a logic swich

When S=1 while R=0 you will got the logic output 1 (set condition)

when S=0 while R=1 you will get logic output 0 (reset condition)

Hence when you made both S and R equal to logic 1, your SR ff may gone crazy or in other words, prohibited

while both S and R at logic 0, SR ff not change or disturb the current output or in other words unchanged

#### CSharpque

Joined Sep 23, 2011
40
I have prepare waveform plz check is it write?

#### CSharpque

Joined Sep 23, 2011
40
I have prepare waveform plz check it.

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#### justtrying

Joined Mar 9, 2011
439
looks fine. Just double check with SR truth table when uncertain.

#### mangyver5223

Joined Oct 22, 2011
17
Yeah, no problem at all #### CSharpque

Joined Sep 23, 2011
40
K thanks but in textbook ans is differ than i have prepared.Ans of book is created in the attachment. so if possible give me proper difference.

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#### djsfantasi

Joined Apr 11, 2010
8,903
Where the values of X (and hence X') do not change from the previous period, there is no need to assert the inputs again... There is one case in the truth table where the output is equal to the previous state.

#### justtrying

Joined Mar 9, 2011
439
The text is right, and your answer is right. In this case it is not necessary to use 0/0 (like djsfantasi pointed out above). This combination becomes important when you are using clocked flip-flops and are trying to sort out how the signals align with the clock. Hope this helps.

#### CSharpque

Joined Sep 23, 2011
40
I have attach file in that my ans is differ than given in textbook. so tell me i m wrong a right?

#### Attachments

• 30.5 KB Views: 25

#### justtrying

Joined Mar 9, 2011
439
if you look carefully at the truth table, you should realize that they accomplish the same thing... examine what S=0 and R=0 does to the output

#### CSharpque

Joined Sep 23, 2011
40
i can't understand what r u saying

#### justtrying

Joined Mar 9, 2011
439
lets try this...

#### CSharpque

Joined Sep 23, 2011
40
thanks a lot i understand as u said . thank u . if q=1110000011 then s=1000000010 and r=0001000000 is it write?
as u said i try this new example. i am just checking as i understand is right?

Last edited:

#### justtrying

Joined Mar 9, 2011
439
looks like you got it 