hi ff,
Check out the circuit that 'Kj' has posted in Post #16, its another option.
That's the method I would suggest.
E

Amazing. KJ, just one uped on that. although i made a mistake that it needs to be -10mV to +10mV output instead of -20mV to +20mV. Since i use an amplifier by 1000 gain. with a maxium limit of -10V to +10V.
But when i change the resistor from 11k to 22k i get a simulation error. which is weird. since 11k simulated results work. but not for 22k. I find that quite weird.

Here is my schematic

 

hi,ff,
It works in the basic circuit.
You must have a problem elsewhere in your full circuit.
E
It would have been helpful if you had posted your complete circuit earlier.

 

Hello, I did post the .asc file in the earlier comments. i could have posted the whole image. i thought it would be confusing to put the entire circuit. i have posted the .asc file below once again

what i noticed is that for the DAC resistor. i cant set it to 22k to get the -10 to +10mV. in this circuit and i get an error. But when i simulate the same circuit with a simple wheatstone bridge it doesnt have any issue. I find this perplexing. as i am able to do it for -20 to +20mV with my circuit at 11k DAC resistor. but not 22k.

 

i can even set the DAC resistor at 33k. but for some reason when i put 22k. it throws me an error

 

I kept redoing the simulations. any DAC value between 17k and 24k gives me an error. all other values of resistances. are fine. im not sure exactly whats wrong.

 

hi ff,
Unless I am missing something, the circuit in post #23 does not show the 11k or 22K.???
Do you have a d/s for the DAC . it may have a maximum load output impedance value limit.??
E

 

Could you check the attachment below.Actually in this simulation. im not even using a DAC for the moment. i put a place holder voltage source there for the time being. but even with that it seems to throw an error.

The DAC i was thinking to use is the one shown below - AD5676R. If it is not able to drive the circuit infront. i could simply throw in an op amp to buffer it right?
https://www.analog.com/media/en/technical-documentation/data-sheets/ad5672r_5676r.pdf

 

hi,
Got the datasheet for the DAC,
As a test try adding a non inverting unity gain OPA between the DAC out and the 22K.
E

 

hi,
Got the d/s for the DAC,
As a test try adding a non inverting unity gain OPA between the DAC out and the 22K.
E

hi could you please explain the term d/s. Im new to this term

 

hi,
Got the datasheet for the DAC,
As a test try adding a non inverting unity gain OPA between the DAC out and the 22K.
E

Hello Eric,
With a buffer op amp infront, the pulse is for some reason not able to be simulated through the output of the amplifier. For some reason it glitches out. I think its the op amp that causes this behaviour. although the output of the op amp seems to be finely putting out the pulse. but when it passes through the amplifier. suddenly the pulse fails a disappears. this shouldnt be the case.

 

hi ff,
It works as expected with a buffer OPA.
Check all your connections and component values, there is some problem with the build.
E

 

Hello Eric,

I found the issue. Basically the simulation doesnt like the R9 and R10 values at 2490ohm. I changed it to 2500Ohm for both and it works for some reason. This is quite strange indeed. why 10ohm of difference can break the simulation. could it be some sort of bug in ltspice?

 

hi ff,
Not seen that problem before in LTS, will run your asc file, let you know the result.
So is the project ready for final bench testing.??
E
Update:
In the .tran settings change the Min Time Strep to 10uSec and retry with 2490R.

 

hi ff,
Not seen that problem before in LTS, will run your asc file, let you know the result.
So is the project ready for final bench testing.??
E
Update:
In the .tran settings change the Min Time Strep to 10uSec and retry with 2490R.

Hello eric,

i did try to change the time step. but for the 2490ohm resistor i still fail to complete the simulation.
But i think its more to do with some weird lts bug. and not really to do with the circuit itself.

The project seems to be very close to final testing. i am thinking to substitute real cases for AD5676 into the simulation.
just to know if the AD5676 can be used to drive 8 such circuits for each output. but even if its not able to. i think i simple OPA buffer should do the trick.
Thank you and KJ for the brilliant support

 

hi ff,
Thats good to hear, it looks an interesting piece of test gear.
When I test bridges and IA's on bench I use the same method as Kj,
If linearity is not an issue, for a quick check, you can use say a 1k trim pot from Vext to 0V,with the wiper via a 22k to the bridge +SIG out.
E

 

hi eric,

Thank you. Indeed what im looking forward to do was to program the DAC(16bit) to output signals. like pulses so as to recreate what we observe in using this architecture in real life. moreover, the testbench circuit can also be used to validate the analog front end card just in front of it. i hope this thread was interesting to you and you were also able to get something out of it thanks once again