Voltage level Shifter using Switch

Thread Starter

hoyyoth

Joined Mar 21, 2020
74
Dear Team,
I asked a related question earlier.(https://forum.allaboutcircuits.com/...summing-amplifier-design.179335/#post-1633714).
Below is my requirement.

I have a DC voltage(VDD) which varies from 1.6V to 3.6V. I CLK signal [0 to 5V,1Mhz] is used to vary this VDD in such a way that when CLK is LOW the circuit output is VDD/2 and when it is High circuit output should be VDD. For example, Let us say VDD=2V, then for LOW CLK the output should be 1V and HIGH CLK output should be 2V.

The issue I am facing now is, When the buffer is not connected to the switch the output of the buffer is proper VDD/2, but once it is connected to the switch the output of the buffer is spiky.

May i know how to solve this issue
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Regards
HARI
 

Thread Starter

hoyyoth

Joined Mar 21, 2020
74
Hi Eric,
I am not able to upload the .asc file.I did not see any option for that.If yoy know the same please let me know.
The switch is ADG719 from Analog devices.
Regards
HAri
 

ericgibbs

Joined Jan 29, 2010
12,974
hi h,
Checking with the LTS current paths, you can see that switching the load cap and also the internal loading of the 719 model was feeding back into the L:T1803 output causing it to create the 'blip'.
For a test reduce the R3 to say 1R and use LTS to show the current thru R3.

E
With R3 = 1ohm current.
 

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