hi,
consider a pnp transistor is properly biased and now an input is fed via emitterbase, during +ve half cycle emmitterbase jn is forward biased and we get the output,but during -ve half it is reverse biased and how do we get the output...

 

Assuming your transistor is set up in a common-emmiter configuration, you will find that the output is provided from the external power supply and not from the input to the base-emitter junction.

As you will know that a p-n junction (like the base-emitter junction) for a silicon transistor will be around 0.7V. So any further increase in voltage at the input beyond this will be seen across the emitter resistor (again assuming you design incorporates one).

Another thing to remember is that the design of BJT means that for transistor to operate in its active region, the emitter-base junction must be forward biased and the base-collector junction must be reversed biased.

You will find the following link on Common-emitter amplifiers explains it more thoroughly:

Common-Emitter Amplifier