Three stages power amplifier school project

Thread Starter

Lucky-Luka

Joined Mar 28, 2019
181
The method you used to find the loop gain is completely wrong.
I'm pretty shocked... So detaching the feedback loop as I did, connecting the negative input to ground and doing the AC analisis of the point that has been detached don't give me loop gain (A*beta), right?
I'm sorry to bother you but since english is not my first language (as you may have understood) I just want to be sure to have understood correctly.

when you talk about the unity gain, do you refer to the closed loop gain?

How this capacitor affects the amplifier voltage gain (ACL)?
Maybe all the feedback current of the feedback goes to the negative input of the differential pair and it gives a better performance? mmmh maybe it's not the case since the input stage is a transconductance amplifier (voltage in current out) right? well... I don't know...
 

Jony130

Joined Feb 17, 2009
5,598
I'm pretty shocked... So detaching the feedback loop as I did, connecting the negative input to ground and doing the AC analisis of the point that has been detached don't give me loop gain (A*beta), right?
It will give you the value of a loop gain. But the numerical values are completely wrong.
And this is why this method is wrong.

Maybe all the feedback current of the feedback goes to the negative input of the differential pair and it gives a better performance? mmmh maybe it's not the case since the input stage is a transconductance amplifier (voltage in current out) right? well... I don't know...
You over complicated it. What influence on Acl (Closed-loop gain) this capacitor in series with RF1 do?

when you talk about the unity gain, do you refer to the closed loop gain?
The unity gain frequency of a loop gain.
 

Thread Starter

Lucky-Luka

Joined Mar 28, 2019
181
It will give you the value of a loop gain. But the numerical values are completely wrong.
It gives a value... but not the right one...
You suggested a great inductor in series to RF2. What's the idea behind it?
1578507073436.png

You over complicated it. What influence on Acl (Closed-loop gain) this capacitor in series with RF1 do?
I don't know how it can affect it... I surrender.
 

Thread Starter

Lucky-Luka

Joined Mar 28, 2019
181
Hi all
I've seen that at 80kHz I've got an efficiency under 60%: more or less 44%. What can I do to reach 60%?
Since it's a theoric exercise maybe can I get rid of R1 and R2 to improve? I've tried but without touching other parameters the efficiency didn't improve.
Cheers
 

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Audioguru again

Joined Oct 21, 2019
6,826
Your power supply is +/-16V but the output signal in the text is only +/-10.2V peak but the waveform shows +/-14.6V.
Maybe the idle current of the output and driver transistors is too high?

The distortion is higher than it should be because the output of the amplifier is clipping.
 

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Audioguru again

Joined Oct 21, 2019
6,826
mmmh... not sure what do at thi point...
If you want to increase the efficiency then use a circuit with the outputs at class-B (no idle bias current which produces crossover distortion) instead of class-AB (uses some idle bias current but produces no crossover distortion). Or use a class-D switching circuit that has an efficiency of around 90%.

Or do you not know how to reduce your clipping distortion? Simply turn down the volume control a little.
 

Thread Starter

Lucky-Luka

Joined Mar 28, 2019
181
The project is focused on a class AB amplifier. the circuit Jony and many of you helped me to design has the right architecture. I just thought that some minor tweaking (I'm trying to change some BJTs) could give me that efficiency at 80kHz...
 

Thread Starter

Lucky-Luka

Joined Mar 28, 2019
181
In class we have seen these commands:
.meas P_DC_1 AVG V(VCC)*(-I(V1)) ; .meas P_DC_2 AVG V(VEE)*(-I(V2))
.meas P_out AVG V(out)*I(R6)
.meas Efficiency AVG P_out/(P_DC_1+P_DC_2)

I guess that's the way the project efficiency is intended.
 
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