Hello everyone,

We are currently developing a three-phase energy meter based on a non-isolated ("Hot MCU") architecture. In this design, the low-voltage section (MCU, AFE, and Ground) floats at line potential, with the measurement front-end referenced directly to the mains via high-value resistive dividers.

We are seeking feedback on the robustness of our current analog front-end implementation, specifically regarding our biasing strategy and signal conditioning for production-grade reliability.

System Architecture Overview:

• Power Supply: 5V SMPS-based supply (non-isolated).
• Voltage Sensing: High-impedance resistive divider (2 X 680KΩ + 2.2KΩ ). This is followed by an op-amp unity-gain buffer.
• Current Sensing: Internal Current Transformers (1000:1 ratio) with a 300Ω burden resistor.
• Biasing: We use an op-amp stage to generate a 2.5V mid-bias (Virtual Ground). Both the voltage buffers and the CT burden resistors are referenced to this single Vgnd point.
• Filtering: Standard RC low-pass stages before entering the MCU ADC pins.

Our Primary Concerns:

1. Global Virtual Ground (Vgnd): Is it acceptable to use a single op-amp-buffered virtual ground for all three voltage channels and three current channels? We are concerned about potential crosstalk or stability issues when multiple ADC sampling transients hit the same bias rail.
2. Differential vs. Single-Ended: While this single-ended approach (referenced to Vgnd) is cost-effective, would moving to a fully differential sensing approach provide significant gains in noise immunity for a "hot" design, or is it overkill given the lack of isolation-related common-mode noise?
3. Phase Shift & DC Offset: Given we are using unity-gain buffers and a shared bias, what are the best practices for compensating for op-amp input offset voltages and phase shifts introduced by the CTs and RC filters in firmware?
4. Production Robustness: For those with experience in industrial or utility-grade metering, are there any "gotchas" regarding long-term drift of the high-value dividers or protection against mains transients (4kV + bursts) in this specific floating-ground topology?

We would appreciate any insights on whether this implementation is suitable for a production-grade meter or if we should pivot toward a more decoupled architecture.

Thanks in advance for your expertise!

 

Allow me to be the first of many: s.c.h.e.m.a.t.i.c - ?

Paraphrasing Rear Admiral Joshua Painter,

"Engineers don't take a dump, son, without a schematic."

ak

 

I have always preferred to compensate the CT’s phase shift with a front end RC network. Of course, this only applies if you know beforehand the CT’s characteristics.

For the voltage offsets, if you are employing any of the newer ADI power metering devices, their offsets are already low enough to be considered within the device’s total error budget.

For the high voltage resistor divider network, I would suggest an integrated resistor divider available from Ohmite, Vishay and others. Their long term stability and temperature tracking will be significantly better than discrete devices, and they will have published surge ratings.