I found this circuit for Unclamped_inductive_switching on the GaNpower website. Actually, i have no idea about the function of the inductor on the top of the circuit. Since the the Vgs of the GaN hemt on the top is always 0. How can it actually conduct? Really need your help for the working principles of this circuit. Thanks!
Since i know that ' Unclamped Inductive Switching (UIS) tests were used to examine the reliability of DMOSFET's in extremely harsh switching conditions. '. But how actually it works in this circuit.

 

The inductor is the load. What is the zero gate voltage, drain current of the device? Could it be non zero?
If so it looks like it could be a substitute for the traditional clamping diode.

 

The inductor is the load. What is the zero gate voltage, drain current of the device? Could it be non zero?
If so it looks like it could be a substitute for the traditional clamping diode.

The gain voltage (Vgs) for the top GaN hemt is 0, i think. Cause gain and source is connecting together. But the hemt below has a source voltage of 5v's square wave.
I am not sure whether the inductor is a load. As for unclamped_inductive_switching circuit, the information i found on the internet decribes it as 'The inductor L starts to discharge the stored energy through the MOSFET device,
When the voltage at both ends of the MOS device reaches bvdss, the MOS device avalanches, the energy on the inductor is released through the MOS device, and the current ID decreases.' But how can this principle connect with this circuit.

 

You need to look at the datasheet for the FET and understand that when Vgs = 0, that is the gate and the source are at the same potential, the drain current, Id, might not be zero. It might require a negative value of Vgs to reduce the drain current to zero.

When the lower FET switches off, the current in the inductor flows through the upper FET until the voltage across the inductor is zero. It is possible the upper FET is never turned off.

EDIT: could you include a link to the GaN Power website and/or a link to the datasheet for the device you are using.

 

You need to look at the datasheet for the FET and understand that when Vgs = 0, that is the gate and the source are at the same potential, the drain current, Id, might not be zero. It might require a negative value of Vgs to reduce the drain current to zero.

When the lower FET switches off, the current in the inductor flows through the upper FET until the voltage across the inductor is zero. It is possible the upper FET is never turned off.

EDIT: could you include a link to the GaN Power website and/or a link to the datasheet for the device you are using.

Well yes and thanks a lot for your patience, the datasheet is as follows. Still i am confused about the path which the inductor discharges. Is it from drain to source or source to drain and why, the only thing i know is that it must go through the top Hemt.

 

The inductor is the load and the point of this exercise. Normally when you switch an inductor there is a large pulse on one end where the inductor tires to oppose the change in current. Because M2 conducts continuously there is no di/dt spike because the inductor current becomes constant and recirculates through M2 which is on all the time. I've cleaned up the schematic a bit and broken the traces out into separate plots. IMHO - this is not switching since the inductor current never goes to zero, but who am I to argue with the guys that wan to sell chips.

 

The inductor is the load and the point of this exercise. Normally when you switch an inductor there is a large pulse on one end where the inductor tires to oppose the change in current. Because M2 conducts continuously there is no di/dt spike because the inductor current becomes constant and recirculates through M2 which is on all the time. I've cleaned up the schematic a bit and broken the traces out into separate plots. IMHO - this is not switching since the inductor current never goes to zero, but who am I to argue with the guys that wan to sell chips.


View attachment 243152

Really thx for your guidance. I might got your idea. Does this mean that this circuit was aim to find out the
Avalanche current of M1? Then why this circuit has M2. Since i search from internet, i got the test circuit always looks like this. I do not know the working principle and function of M2. BUt really thanks! Best wishes.

from https://training.ti.com/understanding-mosfet-datasheets-avalanche-ratings?cu=894015

 

In the original simulation they are using an ideal inductor with a default series resistance of 1 mΩ. This does not represent any objective reality. If you add parasitic series resistance you get more reasonable looking waveforms. The inductor current will go up to a maximum value and return to zero. The PURPOSE of M2 is to avoid the large voltage spike when switch M1 is turned off. It would replace a diode in a traditional circuit.

 

In the original simulation they are using an ideal inductor with a default series resistance of 1 mΩ. This does not represent any objective reality. If you add parasitic series resistance you get more reasonable looking waveforms. The inductor current will go up to a maximum value and return to zero. The PURPOSE of M2 is to avoid the large voltage spike when switch M1 is turned off. It would replace a diode in a traditional circuit.

Sir, do you mean by using the reverse conduction of the GaN hemt to reduce large voltage spike when M1 is turned off? ≧∇≦

 

Sir, do you mean by using the reverse conduction of the GaN hemt to reduce large voltage spike when M1 is turned off? ≧∇≦

Yes, I think that is what I am referring to. As presented the simulation does a poor job of showing it. As I said with the original simulation the current in the inductor never goes back to zero, it just keeps building until it is limited by the default series resistance, at about 27 amperes. That is a power level of over 10kW. That inductor wont be made from AWG #30 magnet wire for sure.

 

Yes, I think that is what I am referring to. As presented the simulation does a poor job of showing it. As I said with the original simulation the current in the inductor never goes back to zero, it just keeps building until it is limited by the default series resistance, at about 27 amperes. That is a power level of over 10kW. That inductor wont be made from AWG #30 magnet wire for sure.

Got your idea! Thanks for your help, seems that i need to learn more. Have a good day, Sir.