source mirror failure..trying to find out what happened

Thread Starter

cmrincon

Joined Oct 25, 2017
40
Hi!

I'm experiment with a source mirror like this:

https://ibb.co/bPnz9o

Q1 is bc556
Q2 and Q3 is 2n2222 to-92 case.

When i connect the power source Q3 blows.
i can't figure out what happens. Can anyone give me any advise in order to don't blow more transistors? Why Q3 blows? Thanks you all

MOD: Moved your image.
circuit.png
 

Jony130

Joined Feb 17, 2009
5,487
This circuit should never be built with discrete transistors without the emitter degeneration resistors. Re = (0.1V...0.7V)/Ic.

Also what is the point of using Q1 in this confuguration? In this configuration Ic1 is very beta dependent. So with the large beta value Ic1 is

Ic1 ≈ (15 - 0.7V)/(500kΩ + 100Ω*β) * β ≈ 11mA for (β = 400)

And the power dissipation in Q3 will be large P ≈ 11mA*15V ≈ 0.165W. And this will cause a thermal runaway (the rise in temperature will decrease the Vbe3 and this will cause the Ic3 to rise further, which will increase the power dissipation even more ) and will eventually blow the Q3.
 

Marc Sugrue

Joined Jan 19, 2018
222
Q2 and Q3 may need a resistor between their emitters and ground. Q3 needs a resistor between collector and V1. Q1 may need a dc path from emitter to base to give you a 0.7v drop.
 

Thread Starter

cmrincon

Joined Oct 25, 2017
40
This circuit should never be built with discrete transistors without the emitter degeneration resistors. Re = (0.1V...0.7V)/Ic.
What do you mean do i need a emitter resistance for Q3?

Also what is the point of using Q1 in this confuguration? In this configuration Ic1 is very beta dependent. So with the large beta value Ic1 is
I will add more complexity to the circuit when everything works thats why i used it. I will replace it and i will use a 15k ohm resistor
 
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Thread Starter

cmrincon

Joined Oct 25, 2017
40
Here's my current source circuit (not a mirror) and using the correct current mirror:
thanks you. i didn't know that bcv61 exist hehe.

Yes, Q2 and Q3 need a emitter resistor.

What output current do you need ? And don't forget about power dissipation in Q3.
i made the maths wrong hehe. i need close to 10 mA through Q3. But i will reduce it to 1 mA in order to reduce power dissipation. Thanks you all
 

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ericgibbs

Joined Jan 29, 2010
18,766
hi c,
I would recommend that in future, you assign/use the actual transistor type into the asc sim file that you are checking.
E
 

Jony130

Joined Feb 17, 2009
5,487
Do i need ebers-moll in order to resolve your circuit?
Yes you need Shockley equation

But in this case, we could try this:

First, notice that R3 = 10R2 and that means that the current in the right transistor in bcv61 is ten times larger than in the left transistor.

So we have:

ΔVbe = Vt *ln (Ic2/Ic1) = 26mV*ln(10) ≈ 60mV

And finaly

Ic1 ≈ 60mV/R1 ≈ 60mV/56Ω ≈ 1mA
 
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This circuit should never be built with discrete transistors without the emitter degeneration resistors. Re = (0.1V...0.7V)/Ic.

Also what is the point of using Q1 in this confuguration? In this configuration Ic1 is very beta dependent. So with the large beta value Ic1 is

Ic1 ≈ (15 - 0.7V)/(500kΩ + 100Ω*β) * β ≈ 11mA for (β = 400)

And the power dissipation in Q3 will be large P ≈ 11mA*15V ≈ 0.165W. And this will cause a thermal runaway (the rise in temperature will decrease the Vbe3 and this will cause the Ic3 to rise further, which will increase the power dissipation even more ) and will eventually blow the Q3.
All perfectly correct I think. So the answer would be to add a resistor from base to V1 of Q1 such that the voltage on the base is roughly fixed. The current through Q1 is then (V1 - Vbase - Vbe) / R1. The emitter degeneration resistors will, by definition, reduce the accuracy of the mirror but also stabilise the circuit. Even if the transistors were perfectly matched, unless the Vce is also perfectly matched the gain of the two will not match (Beta in a BJT is modulated by Vce). The critical factor is temperature of the junctions and that is what the emitter resistors have to compensate for. It is roughly 2.7mV/degC (from memory) so to account for a reasonable variation and as a safe starting point, I suggest to start with resistors that will give say 100mV drop at nominal current of the circuit and reduce them from there. I would also suggest that the two transistors, Q2 and Q3 be physically attached to each other to provide close thermal coupling to limit that thermal runaway problem and so the emitter resistors can be reduced to their absolute minimum value and the mirror performance maximised (for accuracy anyway).
 
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