Hi everyone,

I'm using this FET driver to get a synchronous buck to output 120Vdc to 60Vdc@20A,
This drivers isolate totally the control stage from the power stage (no uC burnt ), I've already used them on a full bridge and worked just fine
Now on more details on what's happening.
My setup is exactly shown on the diagram below, I'm using D1=UF4006, CB= 0.47uF, Q1=Q2=IRFP4768, fs=60kHz,
I assume that the control stage is first powered up and then the power stage so VDDI is 5V and VDD2 is 15V 0v on the power stage
when I probe the high side I only see a DC level while in the low side I actually have my PWM signal just fine, a few seconds later the driver starts heating up and it sort of gets pierced on the bottom and then the magic smoke appears .
I talked to some professors (this is not a school project, I have access to the high power supplies), they claim that the problem is on the long wires I have between the outputs and the half bridge but I have my doubts.
Does anyone knows what could it be?
Thanks

 

Do you have it well bypassed with low ESR caps very close to the chip?
They need to have very short wires.

 

Do you have it well bypassed with low ESSR caps very close to the chip?
They need to have very short wires.

Yep extremely close, Polymer electrolytic and ceramic C0G, measured them and ESR values are around 44mOhms @10KHz

 

Can you remove the FETs and power it up to see if it still overheats?
It may be a good idea to run it on a current limited supply for testing.
Are the supplies coming on together? I'm just guessing but it may be a power sequencing problem too.
And have you checked to see if the FETs are ok?
I wonder if others have had problems with these chips too?

 

Can you remove the FETs and power it up to see if it still overheats?
It may be a good idea to run it on a current limited supply for testing.
Are the supplies coming on together? I'm just guessing but it may be a power sequencing problem too.
And have you checked to see if the FETs are ok?
I wonder if others have had problems with these chips too?

I disconnected the FETs, turns out the drivers doesn't heat up anymore but I still have no output on the high side.
The power supplies are independent, 5v with GND1 and 15v with GND2. First I turn the 5v on, then the 15v and at the end the hpower.

I start probing the FETs with a DMM Fluke,
Drain-Source are not shorted, measured backwards I get the diode voltage drop (0.48v), if I measure between Gate-Source nothing happens (same for G-D) on the same test I verify that Drain and Source where shorted after poking the G-S, inverse process-> open circuit D-S.

I have never encountered a problem like this, I checked twice the connections, I can't believe I lost 3 of those chips already.

 

Can you post photos of your circuit? It is often had to check your own work. Quite a few times I have carefully checked a new PCB layout before sending it to get made only to find I've missed an error that shows itself after assembly.

They do look like pretty neat chips, having complete isolation like that.

 

The converter:




Cables are quite chunky
The boards are still on prototype and labeled before we send them, so any suggestion on their improvement is welcome
Of course this is the not mirrored version, for easy following with the data sheet
The bottom of the driver has no changes at all, it's the same on physical view, I couldn't took a picture my phone just died and the place is too dark

 

What is the second board? How are the FETs to be mounted?
As you have it set up, the leads are very long. I would mount the FETs directly on the first board, leads as short as you can make them.
And have the C2/U3 as close to pins 9 and 10 as you can.
Also, the board only shows C2 (electro) on the 15V. You need a 0.1uF ceramic across 9 and 10 at the chip.
Otherwise your board circuit looks ok. But what is the actual board you are using in your proto? the photo of the board only shows a part of it and the leads are really long. Not a good idea. Long leads can cause the circuit to be unstable.

 

What is the second board? How are the FETs to be mounted?
As you have it set up, the leads are very long. I would mount the FETs directly on the first board, leads as short as you can make them.
And have the C2/U3 as close to pins 9 and 10 as you can.
Also, the board only shows C2 (electro) on the 15V. You need a 0.1uF ceramic across 9 and 10 at the chip.
Otherwise your board circuit looks ok. But what is the actual board you are using in your proto? the photo of the board only shows a part of it and the leads are really long. Not a good idea. Long leads can cause the circuit to be unstable.

I'm using both boards, the first board (second photo) is where the driver goes and the third board (third photo) is the big power stage where the FET's are connected through the wires, sorry there's a giant inductor connected in there it obscures almost everything.
Because of the big heat sink I'm forced to mount them horizontally, that's why I decided to place those high current wires, I kind of patched that 0.1uF capacitor as I tested on the 15v rail (foot print added to the PCB now).
I see, I will try to shorten the wires, but I still think it's weird that the chip is overheating, I tested with my IR2110 and yes there is some ringing on the Vgs but no overheat
Perhaps it's a very sensitive chip?