To answer my last question, it appears that it is NOT safe to power the 555 IC from the automotive circuit, at least from what I'm finding. The NPN-to-PNP approach might be the simplest way to do this, unless someone knows of a better way?

Still not sure about that capacitor value. If 0.1 uF equates to 700 Hz, does 1.0 uF equate to 7 kHz? Or is it 70 Hz? Will changing that affect anything else?

Beyond that, everything else has been answered! Thank you guys VERY much for all the help you've provided, it's been a huge blessing and I will be sure to pass it on!

 

Bump:

To answer my last question, it appears that it is NOT safe to power the 555 IC from the automotive circuit, at least from what I'm finding. The NPN-to-PNP approach might be the simplest way to do this, unless someone knows of a better way?

Still not sure about that capacitor value. If 0.1 uF equates to 700 Hz, does 1.0 uF equate to 7 kHz? Or is it 70 Hz? Will changing that affect anything else?

 

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Still not sure about that capacitor value. If 0.1 uF equates to 700 Hz, does 1.0 uF equate to 7 kHz? Or is it 70 Hz? Will changing that affect anything else?
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You're going in the wrong direction.
A larger capacitor causes a lower frequency (capacitor takes longer to charge and discharge), so if 0.1μF gives 700Hz then 1.0μF would give ≈70Hz.

 

So 0.01 uF would provide the 7 kHz range I'm looking for, perfect!

Updated the schematic, hopefully for the last time. Does this look good? Anything else I need to tweak?



Fingers crossed!

 

Hi

Don't forget 0.1uF bypass caps on the +power pin of each IC, and you might want to pull down the unused input pins on the ULN2003.

I'm wondering if the 555 output will bounce on power up(?).

 

Hello, thanks for the input! Still learning, so this is quite helpful to me

Don't forget 0.1uF bypass caps on the +power pin of each IC

Would a single 0.1uF cap from the 5V regulator's Vout to GND work, or is it recommended to put one on each IC input to GND? ULN2003 chips are immune to this I assume?

you might want to pull down the unused input pins on the ULN2003.

Good call, I'll fix that for the next schematic I post. Also caught the "0.` uF" cap typo by the 5V regulator springing up again, I'll get that fixed once and for all. Should read "0.1 uF"

I'm wondering if the 555 output will bounce on power up(?).

Which one, U2 (bit shifter clock), or U8 (PWM)? U8 I don't mind as the frequency is so fast. For U2, if it will only bounce once, this is fine as its purpose is to start illuminating the LED's. Being "all off" is its normal, powered-off state, so a single bounce at the beginning would simply make it turn on to an immediate first bit out, which actually might be the best way to go. If it keeps bouncing to the point where the timing is screwed up, that will need to be fixed, but one potential bounce on each power up is acceptable for this use.

Bear in mind that this is purely for visual effects, and is NOT for use in, say, signal data or anything like that. As long as it looks about as smooth as the GIF in post #1, that's all I'm concerned about.

EDIT:
Or does "single bounce" in this context mean sending two clock signals before it delays at all, which would illuminate two LED strings instead of just one on startup? That is something I'd like to avoid, but if it just lights one string on startup, that's more than acceptable.

 

Hello, thanks for the input! Still learning, so this is quite helpful to me

Would a single 0.1uF cap from the 5V regulator's Vout to GND work, or is it recommended to put one on each IC input to GND? ULN2003 chips are immune to this I assume?

A single 0.1uf cap from the +supply pin to ground for each 74HC164 and each 555 is best practice. Each cap should be placed as close as possible to the IC supply pin. The cap helps keep the supply voltage stable, which, it turn, keeps the logic/signal levels stable. Its also recommended to pull down the unused inputs of the ULN2003 with a resistor. A 4.7k ohm resistor from each unused pin to ground should be OK. The "COM" pin (pin 8) should be connected to +V and I would also connect a bypass cap from COM pin 8 to ground.

 

Or does "single bounce" in this context mean sending two clock signals before it delays at all, which would illuminate two LED strings instead of just one on startup? That is something I'd like to avoid, but if it just lights one string on startup, that's more than acceptable.

I'm referring to the potential for the 555's output signal to go high, then low, on power up. The number of times is unpredictable.
A "power on reset" is used to prevent this if its important. Its your call.

 

I'm referring to the potential for the 555's output signal to go high, then low, on power up. The number of times is unpredictable.
A "power on reset" is used to prevent this if its important. Its your call.

How can we prevent the bouncing then? Does this affect both 555 timers, or just one of the two?

As previously stated, I'm not too concerned with this on the PWM 555 (U8) as the frequency is so fast, but the bit shifting 555 (formerly U2, now U6) is important to keep under control for any more than one bounce. I'm okay with writing off one bounce as a feature, but two or more isn't going to be good.

I've made all the other changes. Re-annotated the parts, so the part IDs have changed.

 

How can we prevent the bouncing then? Does this affect both 555 timers, or just one of the two?

As previously stated, I'm not too concerned with this on the PWM 555 (U8) as the frequency is so fast, but the bit shifting 555 (formerly U2, now U6) is important to keep under control for any more than one bounce. I'm okay with writing off one bounce as a feature, but two or more isn't going to be good.

I've made all the other changes. Re-annotated the parts, so the part IDs have changed.

Well....in your schematic, U6 is astable multivibrator, basically a clock generator with a clock frequency of about 20-30 Hz.
Its clocking the 164's. Since you have a POR on the 164's (pin 9), a momentary rise on the output of U6 shouldn't matter.

Edit: Built the clock generator and saw no momentary rise on power up.

 

Well....in your schematic, U6 is astable multivibrator, basically a clock generator with a clock frequency of about 20-30 Hz.
Its clocking the 164's. Since you have a POR on the 164's (pin 9), a momentary rise on the output of U6 shouldn't matter.

Edit: Built the clock generator and saw no momentary rise on power up.

Is 20-30 Hz the full range? I used this calculator as referenced in a prior post, and it comes out to 12.884 Hz (pot at full 47 kΩ) to 80.167 Hz (pot at 0 Ω), so I assumed that was correct.

Good to know the clock doesn't rise on power up though!

 

Is 20-30 Hz the full range? I used this calculator as referenced in a prior post, and it comes out to 12.884 Hz (pot at full 47 kΩ) to 80.167 Hz (pot at 0 Ω), so I assumed that was correct.

Good to know the clock doesn't rise on power up though!

Yea...I didn't check the whole range and I didn't have 6k resistors so I tested with 5.1k resistors and a 50k pot. What is the target frequency?

 

Yea...I didn't check the whole range and I didn't have 6k resistors so I tested with 5.1k resistors and a 50k pot. What is the target frequency?

Oh, okay. Target frequency is 75 ms (13 ⅓ Hz) to 12.5 ms (80 Hz), but slightly outside this range is fine. Basically, I want a full 20 cycles to last anywhere from 0.25 to 1.5 seconds. At its current setting, if the calculations above are indeed correct, this works out to 12.474 ms (0.249 seconds full cycle) to 77.616 ms (1.55 seconds full cycle), which is spot on for me.

Were there any other areas of concern in the last posted schematic? Just want to make sure I didn't miss anything.

 

Oh, okay. Target frequency is 75 ms (13 ⅓ Hz) to 12.5 ms (80 Hz), but slightly outside this range is fine. Basically, I want a full 20 cycles to last anywhere from 0.25 to 1.5 seconds. At its current setting, if the calculations above are indeed correct, this works out to 12.474 ms (0.249 seconds full cycle) to 77.616 ms (1.55 seconds full cycle), which is spot on for me.

OK

Were there any other areas of concern in the last posted schematic? Just want to make sure I didn't miss anything.

How much current can the voltage regulator handle?

 

How much current can the voltage regulator handle?

Good point, I'm using one of these, which can only handle about 89 mA. Is this enough?

 

Good point, I'm using one of these, which can only handle about 89 mA. Is this enough?

Yeah...I think that'll be ok. The heavy current is being drawn directly from the 12v supply.

 

Oh, okay. Target frequency is 75 ms (13 ⅓ Hz) to 12.5 ms (80 Hz), but slightly outside this range is fine. Basically, I want a full 20 cycles to last anywhere from 0.25 to 1.5 seconds. At its current setting, if the calculations above are indeed correct, this works out to 12.474 ms (0.249 seconds full cycle) to 77.616 ms (1.55 seconds full cycle), which is spot on for me.

Were there any other areas of concern in the last posted schematic? Just want to make sure I didn't miss anything.

Um....how about using 5.6k resistors with a 50k pot? 5.6k is a standard value and will be easier to find.
That would make the range Min=12.354hz to Max 89.853 Hz

 

Um....how about using 5.6k resistors with a 50k pot? 5.6k is a standard value and will be easier to find.
That would make the range Min=12.354hz to Max 89.853 Hz

I have yet to come across a list of "standard" resistor sizes, so that's why I went with 6k. Sure, let's do that!

Replacing both 6 kΩ resistors with 5.6 kΩ resistors, and the 47 kΩ with a 50 kΩ pot, I get:
Pot at 0 Ω: 85.893 Hz = 11.642 ms clock = 0.23 second LED cycle
Pot at 50 kΩ: 12.354 Hz = 80.942 ms clock = 1.62 second LED cycle

Still close enough to spec to work!

Bear in mind that the PWM section is not finalized until I build a test circuit and decide the minimum duty cycle I'm comfortable with, so RV2 and R5 values will change once I get that information. For said test circuit, RV2 will be a 10K pot, and R5 will be replaced with a simple bypass connection. For the test circuit, it will look like this:

:

Once I figure out the minimum duty cycle, then I go back to the RV2/R5 setup and change their values, and possibly some others if needed.

Beyond that, is there anything wrong with the PWM or power side of things? I have three schematics (one for each color: red, white, and amber) for "test boards" that will clue us in as to what else needs to be changed before I go all-out and build the final design. This will also tell me things like (for example) what the minimum PWM duty cycle needs to be.

Updated schematic:

 

If you look at the 2003 datasheet, you'll see that each input has internal pull down resistors and reverse polarity protection. You can delete R8, R9, R10, C7, and C11.

ak

 

Fixed! Was there anything wrong with the PWM section that you saw? Just making sure as I'm ready to order the "test" boards to figure out the required minimum duty cycle