If the buzzer is to stay on until power is reset, perhaps a thyristor is the answer:

The buzzer only comes on after the time delay ends and then stays on until reset.

An SCR won't work, but you can use boostbuck's two transistor latch that emulates a thyristor, by connecting to the PNP input which triggers from the falling edge at the end of the 555 delay pulse (sim below):

 

The buzzer only comes on after the time delay ends and then stays on until reset.

Oops - missed that!

Maybe this - thyristor to hold off until 555 output is high, with Q3 switching on output low....

 

An SCR won't work....

I'm not so familiar with them TBH - why not?

 

Oops - missed that!

Maybe this - thyristor to hold off until 555 output is high, with Q3 switching on output low....

View attachment 340771

Q4 has no base resistor

 

Maybe this - thyristor to hold off until 555 output is high, with Q3 switching on output low....

What thyristor?

You only need two transistors, as I showed.

 

What thyristor?

Modified version using both a SCR and transistor.

 

The tweak to the simulator was that I added a series resistor between OUT and the buzzer. It worked once. Never again. (?)
Afterwards, almost playing, I hit the STOP button while the timer was running. Then it beeped again.
I think the simulator is not working properly.
The issue that motivated me to post is the one I mentioned before. Whenever OUT is low, it will beep, whether the timer has been activated or not. I think your opinion is different and more well-founded. I am just an amateur with little knowledge.

Which simulator are you using?

 

Which simulator are you using?

The only one I have: Livewire. It's old but it's served me well before.

 

Modified version using both a SCR and transistor.

Does that have an advantage over using just two transistors?

 

Does that have an advantage over using just two transistors?

If refering to your circuit in post #21 then yes.
The buzzer and the relay are not to be activated at the same time as in your circuit.
I mentioned this before:
Power ON: relay and buzzer OFF
Press Start button: timer starts, relay ON buzzer OFF
Timer ends: relay OFF, buzzer ON until manually reset.

 

Does that have an advantage over using just two transistors?

As far as I can see, your circuit has the buzzer in parallel with the relay, but the spec asks for the buzzer to sound AFTER the relay. The third transistor inverts the output to cause the buzzer to sound when the 555 finishes timing.

 

As far as I can see, your circuit has the buzzer in parallel with the relay, but the spec asks for the buzzer to sound AFTER the relay. The third transistor inverts the output to cause the buzzer to sound when the 555 finishes timing.

Okay.
I missed that the relay is energized during the delay time.

So it's a tradeoff between using an SCR, or one more transistor to provide an emulated SCR triggered by the negative going 555 output pulse.

 

.....an emulated SCR triggered by the negative going 555 output pulse....

No, still not there, sorry. The 'SCR' is triggered by the positive going timing pulse, and serves to hold the buzzer off from power-on until the timing pulse occurs. Once the timing pulse triggers the SCR the buzzer is still off until the end of the timing period when the low output of the 555 switches the upper PNP on as well as the SCR.

I've (carelessly) used 'thyristor' to refer to both an SCR device and to the construct of back-to-back transistors that emulates the SCR behaviour. My apologies - a bit confusing when I look back.

 

My version on using all transistors.

 

One less transistor by the 555 falling-edge negative triggering the 2-transistor emulated SCR:

 

One less transistor by the 555 falling-edge negative triggering the 2-transistor emulated SCR:

View attachment 340841

What's to prevent Q2 from activating when first powered ON since the output of the 555 is Low?

 

What's to prevent Q2 from activating when first powered ON since the output of the 555 is Low?

Yes it's possible to activate if the power is rapidly applied, so the Reset PB may have to be initially pressed after power on.
Shouldn't be a problem unless the circuit is frequently powered on and off.

 

Another thing I notice is that the buzzer current goes through the emitter-base of Q1.
Is that desirable?

 

"Desirable"?

The transistors are not an SCR (although configured to behave as one) so won't have the optimised current paths an SCR die would have.

But the limit of Ib should be determined by power dissipation. The only example I found is the 2N3904 which gives max base current of 100mA, a third of maximum collector current.

 

"Desirable"?

The transistors are not an SCR (although configured to behave as one) so won't have the optimised current paths an SCR die would have.

But the limit of Ib should be determined by power dissipation. The only example I found is the 2N3904 which gives max base current of 100mA, a third of maximum collector current.

All depends on how much current the buzzer requires.