Reduce Frequency of Waveform

Thread Starter

MrsssSu

Joined Sep 28, 2021
264
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Dear all, may I ask if there is a circuit that produces the following input and output which basically reduces its frequency by 2 times which also basically stretch out the input waveform to produce the following output?

Thank you for reading :)
 

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Papabravo

Joined Feb 24, 2006
19,617
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Dear all, may I ask if there is a circuit which output a reduced-frequency of square waveform given in its input while maintaining its duty cycle?

Thank you for reading
I can imagine such a thing, but it would take a fairly complicated bit of circuitry inside an FPGA. Using a very high frequency clock I would sample the incoming signal and use the duty cycle ratios with a slower clock to produce the output signal. I'm guessing this would not be practical for your application.
 

Thread Starter

MrsssSu

Joined Sep 28, 2021
264
I think you would need a microprocessor to do that.
Well, I guess it would need some sort of memory I believe. Because if the duty cycle is different for different times, it would require some sort of memory to store it so that after processing, it will produce a sqaure wave with a lower frequency :)
 

crutschow

Joined Mar 14, 2008
31,151
Well, I guess it would need some sort of memory I believe
Of course.
The micro could continuously calculate the duty-cycle of the incoming waveform and store that info (which wouldn't require much memory).
Then it would output a waveform at a lower frequency with that same duty-cycle.

What is the frequency of the incoming signal, and what frequency do you want for the output?
 

MrSalts

Joined Apr 2, 2020
2,628
Well, I guess it would need some sort of memory I believe. Because if the duty cycle is different for different times, it would require some sort of memory to store it so that after processing, it will produce a sqaure wave with a lower frequency :)
What is generating the PWM signal? If it is a microcontroller, you can simply add a slower crystal (if it uses a slower external crystal). Since PWM is a register of frequency ticks and a second register for clock ticks on state.
 

crutschow

Joined Mar 14, 2008
31,151
A possible way to do it analog is to average the incoming wave voltage to give a DC voltage proportional to the duty-cycle.
Then use that voltage to adjust the duty-cycle of a lower frequency PWM oscillator to get the same average voltage (and thus duty-cycle).
 
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WBahn

Joined Mar 31, 2012
27,942
View attachment 281639

Dear all, may I ask if there is a circuit which output a reduced-frequency of square waveform given in its input while maintaining its duty cycle?

Thank you for reading
As is often the case, SO much important information is left out?

What is the voltage of the input and output waveforms?

What is the frequency (or range of frequencies) for the incoming waveform? Is it a few tens of hertz, or a few tens of gigihertz, or what?

How much is the frequency to be reduce by? Is it a constant factor, or does it have to be variable? If so, over what range?

What is the range of the duty cycle of the input waveform? How quickly does it vary?

How close does the output duty cycle need to track the input duty cycle? How much time (or how many cycles) can the output waveform take to stabilize into the desired relationship with the input waveform?

Does the circuit need to be analog? Can it be digital?

And for the big one (most of the time), what is the actual problem that you are trying to solve? It is often the case that you have already gone down a rabbit hole when there might be a simple solution to the underlying objective.
 

Tonyr1084

Joined Sep 24, 2015
7,210
While I can't directly solve the problem I'm wondering the following: (and these numbers are merely examples)

You want High for 75% of the duty cycle.
You have (for instance) PWM operating at 20KHz
You want (for instance) PWM operating at 15KHz

Why? 75% is 75%. Almost nothing changes. You could have an operating frequency of 10Hz and still have 75% duty cycle.

Seems like a request that I fail to make sense of. But that's just me.

Perhaps a little more clarity on your goal would help.
 

Ian0

Joined Aug 7, 2020
6,736
The resolution wouldn’t be good, but you could clock a serial-in-parallel-out shift register at 8 times the original frequency, connect its outputs to the parallel inputs of a parallel-input-serial-output shift register clocked at a different frequency.
Its a bit similar to the pitch-shifter that uses a circular buffer.
 

Tonyr1084

Joined Sep 24, 2015
7,210
View attachment 281653
Dear all, may I ask if there is a circuit that produces the following input and output which basically reduces its frequency by 2 times which also basically stretch out the input waveform to produce the following output?

Thank you for reading :)
Would have to give it a little more thought but I'm thinking a 2 input AND gate along with a Dual D Flip Flop. But the logic behind that might not work. Have a lot to get to today so it'll be quite a while before I get back here.
 

Thread Starter

MrsssSu

Joined Sep 28, 2021
264
Would have to give it a little more thought but I'm thinking a 2 input AND gate along with a Dual D Flip Flop. But the logic behind that might not work. Have a lot to get to today so it'll be quite a while before I get back here.
Hi, take your time :). Thanks. I can't really crack my head around this, or else I might try it haha
 

Alec_t

Joined Sep 17, 2013
13,234
In the good old days you'd just use a tape recorder to record the pulse train at normal speed and play it back at half speed. I don't suppose that's an option for the present project?
Nowadays you could record the pulse train as a video soundtrack, upload the vid to U-toob and set the playback speed to half.
 

BobTPH

Joined Jun 5, 2013
6,095
Am I missing something? What I see in the example is a transition at time t in the input comes at time 2t get in the output.

So, after 100 second the, the output is putting out the one seen at 50 seconds in the input.

So the input needs to be stored in some fashion
with the storage needed continuing to increase the longer it runs.
 

Thread Starter

MrsssSu

Joined Sep 28, 2021
264
Am I missing something? What I see in the example is a transition at time t in the input comes at time 2t get in the output.

So, after 100 second the, the output is putting out the one seen at 50 seconds in the input.

So the input needs to be stored in some fashion
with the storage needed continuing to increase the longer it runs.
Yes, thats right :)
 

BobTPH

Joined Jun 5, 2013
6,095
Okay, so how long does it have to run?

And, with what time resolution.

And can the height of the pulses vary? Do we have to duplicate that? With what resolution?

Or, better still, what problem are you trying to solve?
 

Thread Starter

MrsssSu

Joined Sep 28, 2021
264
Okay, so how long does it have to run?

And, with what time resolution.

And can the height of the pulses vary? Do we have to duplicate that? With what resolution?

Or, better still, what problem are you trying to solve?
Yes. The input pulse and timestep are just examples. Sure, the height of pulses can change as you like it. But the function of reducing the frequency by halved must be achieved :)
 

BobTPH

Joined Jun 5, 2013
6,095
So if this system has been running for two days. the output is is the extended pulses from a day ago, right?

Do you not see a problem with that?
 

Thread Starter

MrsssSu

Joined Sep 28, 2021
264
So if this system has been running for two days. the output is is the extended pulses from a day ago, right?

Do you not see a problem with that?
Well, erm maybe just take 1 seconds of inputs, and you know store it perhaps, and output 2 seconds of outputs. I believe this is extremely easy when we use microcontroller so that's I am curious to do this in analog manner for learning process :). Thank you
 
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