I am not sure what to do with the R and S inputs to get this 4-bit counter to work. LED's are attached to the Q outputs. Suggestions would be appreciated. Thank you.

 

They're LOW active, so tie them HIGH.

 

View attachment 348407I am not sure what to do with the R and S inputs to get this 4-bit counter to work. LED's are attached to the Q outputs. Suggestions would be appreciated. Thank you.

They're LOW active, so tie them HIGH.

That works! Thanks, Dennis.
Rich

 

TTL had risk of failure from over voltage on the inputs in the old days if the regulator had flyback or overvoltage spike, so the standard practice was always to current limit all the unused inputs to a 10 K pullup R. But if operating in the lab on a breadboard, the input will behave like a logic "1" when open and TTL always floats at two Vbe drops or 1.4V to 1.3V and pulling down below this actives the logic 0 input state, but we define a gray zone for Vin logic to maintain a high SNR and thus zero error rate for interconnecting ICs. Those reasons may be historic early '70s with more reliable LDO's now, but I thought to mention it.

Of course, CMOS is different and undefined floating and a risk leaving open to stray overvoltage.

 

View attachment 348407I am not sure what to do with the R and S inputs to get this 4-bit counter to work. LED's are attached to the Q outputs. Suggestions would be appreciated. Thank you.

You should spend some time with the datasheet and become comfortable with how to find answers to these kinds of questions. That is a critical skill in this game.