Hi all, please check out the 4-layer board contained on page 17 of the following> https://www.ti.com/lit/ug/snou140a/...ps%3A%2F%2Fwww.ti.com%2Ftool%2FLMG34XX-BB-EVM.
It is for a daughterboard card from Texas Instruments for a half-bridge GaN power stage. I am finding it quite confusing for the following reason: It looks as though some of the figures are flipped? If you look at figure 16 and 17 for example, the third and fourth layers of the board, the location of the 6-pin jumper has switched sides. It looks like the first three layers are in sequence and aligned correctly whereas the last layer has been flipped. Does this seem to be the case? Is it common practice to show the outer signal layer flipped w/r/t the first signal layer, if so why?
If not - is this something you've not see before and is there any easy way to make this board easier to follow and copy?
Finally, what are all the vias for? Do these vias make connection between the top layer where the VCC and GND is connected and pass it to the respective VCC and GND copper layers via the vias? I also believe the vias on the switches are for heat sinking - are these passed to the VCC layer or the GND layer for heat dissipation, or does it not matter so much?
For context, I need to design myself a GaN board. The only difference is that I need a two-switch forward converter and therefore I need to slightly redesign the board. I don't know how else to do this so I plan to just build the board up in Altium as a schematic and then PCB and break the Vsw node. I don't think this will be a massive difficulty if I follow the board design well..?
Thanks for your help in advance!
It is for a daughterboard card from Texas Instruments for a half-bridge GaN power stage. I am finding it quite confusing for the following reason: It looks as though some of the figures are flipped? If you look at figure 16 and 17 for example, the third and fourth layers of the board, the location of the 6-pin jumper has switched sides. It looks like the first three layers are in sequence and aligned correctly whereas the last layer has been flipped. Does this seem to be the case? Is it common practice to show the outer signal layer flipped w/r/t the first signal layer, if so why?
If not - is this something you've not see before and is there any easy way to make this board easier to follow and copy?
Finally, what are all the vias for? Do these vias make connection between the top layer where the VCC and GND is connected and pass it to the respective VCC and GND copper layers via the vias? I also believe the vias on the switches are for heat sinking - are these passed to the VCC layer or the GND layer for heat dissipation, or does it not matter so much?
For context, I need to design myself a GaN board. The only difference is that I need a two-switch forward converter and therefore I need to slightly redesign the board. I don't know how else to do this so I plan to just build the board up in Altium as a schematic and then PCB and break the Vsw node. I don't think this will be a massive difficulty if I follow the board design well..?
Thanks for your help in advance!