I am working with a PMOS-based switching circuit where the PMOS turns on for 20 ms with a total period of 40 ms (i.e., a 50% duty cycle). In the schematic, there is a capacitor C1 and resistor R2 placed between the gate and source terminals of the PMOS.

I'm trying to understand the following:
Any insight or calculation approach would be greatly appreciated.
Thankyou

I'm trying to understand the following:
- What is the purpose of C1 and R2 between the gate and source of the PMOS?
- Will the circuit still function correctly without these components?
- If they are necessary, how should I calculate appropriate values for C1 and R2 based on the 20 ms ON time and 40 ms period?
Any insight or calculation approach would be greatly appreciated.
Thankyou
