Pulse Density Modulation

Thread Starter


Joined Sep 1, 2018
I would like to implement a Pulse Density Modulation circuit on LTspice.

It substantially consists of cancelling some pulses, maintaining the period and the duty cycle fixed.

Can you suggest me how to implement it?

Please see the attached picture of the idea.

Thank You.



Joined Jan 17, 2007
Dear Cmartinez,
Actually I would like to simulate the system on LTspice. After checking the results, I'll think how to implement it on the Microcontroler.
You can make a table of the pulses that you want to generate in an excel file, then export the results to a text file, and reference that text file at a voltage source in LTspice
Last edited:


Joined Mar 14, 2008
You could use an AND gate with one input being the clock signal, and the other input being the modulating signal.
When the modulating signal is high the pulses pass and when the modulating signal is low, they don't.
You can use a PWL table with the voltage source to generate an arbitrary modulating signal, if desired.

To avoid truncated pulses, the modulating signal could go through a clocked flip-flop.


Joined Oct 7, 2019
Pulse Density Modulation circuit on LTspice.
I went back and looked at how I did it in a IC.
What I did is 8 bit or 256 levels of modulation. What you showed is 5 bit.
How many bits do you want?
What I made will do what you show in post #1 if you limit the into to half scale. Input range 0 to 255.
At 128 you get -_-_-_-_-_-_-_
At 127 you loose one "on".
At 126 you loose two "on".
So it looks much like what you did.
At 1 you get only one "on".
At 0 you get no "on" times.

What is different in my design: at 129 you get -_-_--_-_-_- Can you see that one time where it was high for two ticks.
At higher numbers it is high more of the time. At 255 it think it is high all but one tick.

Another question: what type of input do you want? Analog or digital. What I did years ago had 8 digital wires as an input.