Please I beg for your help. Please help friends! (Advice sought about self-directed study)

Discussion in 'General Electronics Chat' started by AnalogDigitalDesigner, Aug 9, 2018.

  1. AnalogDigitalDesigner

    Thread Starter Member

    Jan 22, 2018
    121
    2
    Hi friends!

    Please, I want to become an analog chip designer. I am 32 years old and I am doing a masters degree in microelectronics. My bachelors degree was in mathematics, but my electronics knowledge is equivalent to a bachelors in electronics. I do not have experience in chip design however, and I really want to become one. It's my life's dream and I give all my time to it. But I feel there is so much to learn that I don't know and I feel overwhelmed. I wonder if my feeling of being overwhelmed is because I am late, or it is because everyone feels the same because there is really so much out there to know.

    I'd like to know what is the best thing I can do to accelerate my progress? Should I be studying application notes and datasheets? I am currently reading Gray's analysis and design of analog integrated circuits, and I think it's a great book, and I plan to learn everything in it. it's the best book I've ever found.

    Should I just keep reading and finish this book? Also, as for jobs, am I old at 32? Will companies give me a chance when I graduate? I plan to also do a PHD in electronics when I finish my masters. But I wonder. Do companies prefer younger people? Or will be be fine?

    Thank you so much, I appreciate your help and time friends.

    Best wishes

    Paul
     
  2. qrb14143

    Member

    Mar 6, 2017
    112
    18
    I see no reason why you would not be considered for jobs at the age of 32! Indeed, in many countries it is unlawful to discriminate based on age. It is easy to feel overwhelmed by the breadth of material in electronics. I have a BEng in Electronic and Electrical Engineering, starting a PhD this year and I assure you my knowledge of analogue electronics is nowhere near that of some members on here. You must remember that some members of this forum have decades of experience in their area.

    Your engineering degree will equip you with the tools to analyse and understand circuits - nothing more. It is up to you to read up on your area of interest and try to secure a job or PhD in that area.
     
  3. WBahn

    Moderator

    Mar 31, 2012
    23,969
    7,423
    While there are some courses you can take that focus on IC design, the best way to learn how to design ICs is by getting hired by a company to design ICs -- the nature of the beast makes it hard to do IC design as a hobby. During your Masters work, try to look for any opportunity you can to be involved in IC design or fabrication. Try to choose your thesis so that it involves IC design, even if only in simulation. Try to work with a company as part of your project, even if it's only getting one of their engineers to review your thoughts and circuit designs.

    No, you are not too old. At the time I was hired as an IC designer I was 30 years old and my total experience with ICs was sitting through an afternoon lecture on how ICs are fabricated that was part of the Summer Field Session I took after my sophomore year six years earlier.

    The key is to make sure that you have strong fundamentals. The companies that do this work know that when they hire someone that they are likely to have little to no actual IC design experience, particularly as it relates to their specific market niche, so they will guide you along.
     
  4. AnalogDigitalDesigner

    Thread Starter Member

    Jan 22, 2018
    121
    2
    Hi guys. Thank you so much for your gentle messages. Your messages really change my perception! So you were hired at 30 with no experience in IC design? What kind of work were you going to perform at that company to start out ? And for how many years did you stay there? What kind of IC's did you design? Did you use Cadence for the work?

    At my university we learn Cadence. I will restart the course this september because I had suspended my studies last year because I wanted to study more on my own. I found the masters course to be rather weak. Basically we learn Verilog and Cadence there. I wish it was more focused on IC design, although one of the modules is called "Integrated Circuit Design".

    The reason why I want to focus on analog/mixed signal is because as far as I know, digital IC's are designed with Verilog, and to me that is not electronics. That is code. It's too high a level for my taste. I'd like to be as near the metal as possible.

    Please, I'd like to ask you another question. I think it might be the most important question I will ask here.

    WHAT should I be studying right now in order to have the best chance of getting into IC design? I have books on semiconductor physics, and books on analog IC analysis and design. I know they are both important, but does an IC designer really use semiconductor physics in their day to day ? I would guess semiconductor physics is more important to process engineers. But I am likely wrong.

    The book I have on semiconductor devices is by Ben G. Streetman. And the book on analog IC analysis is by gray & meyer. They are both excellent.

    Also, what IC design software are most used in the industry and academia? Is it Cadence? I have LASI here, which is a free IC layout software. I find it good, but it's not used in the industry.

    What is the best free software I should be studying for practice? Is it Magic? Or maybe Glade?

    Thank you so much.

    I wish you the very best

    Paul
     
  5. WBahn

    Moderator

    Mar 31, 2012
    23,969
    7,423
    The company I worked for specialized in full-custom mixed-signal pixel-oriented ASICs, mostly detector, imaging, and readout ICs. We did lots of lunatic-fringe designs that no one else would touch because they thought it couldn't be done or they saw no way to do it with their design tools (mostly the big $250k/seat Cadence suites). Because we used very low end design tools (schematic capture, simulation, layout, place-and-route, verification tools totaled about $7k/seat) the limit was on what we could do and not what the tool could do. We did work with (and for) companies that used the Cadence seats and they were pretty universally shocked when they saw the tools we used -- at first they would be appalled and then they would be awestruck when they saw what we were able to do with them. But there was a hidden cost that we learned the hard way. We hired a layout technician that had twenty years of layout experience with Intel and it was a complete disaster. She was completely dependent on the Cadence tools to do her thinking for her and she knew nothing about actual layout -- she couldn't recognize a transistor when she saw one. From that we realized that our design flow (which matched the kind of out-there designs we did quite well, actually) required that the engineer that designed the circuit needed to be the one to lay it out, because our designs tended to have performance critical layout sensitivities.

    My first job at the company was a chip that had no transistors on it -- it was a metal mask for an upcoming design that could fabbed very cheaply so that we could confirm that our blatant violation of the overglass design rules could actually be fabbed and so that our customer could determine what the actual geometries as fabbed were going to be since it was so far outside what the fab house had ever done that they had no clue what the result would be.

    My second job was to track down an error on a chip we designed for Texas Instruments that we were getting ready to submit but that was failing LVS. Back then, especially with our tools, the LVS reports were very primitive and it was quite a detective effort to track down errors. If printed out, the LVS report could be several thousand pages long. I wrote a number of C programs to filter through the report files looking for the key nuggets. Just a couple years before I started there the LVS was all done manually by taping printouts of the layout on the conference room wall and engineers spending time visually verifying that each circuit matched the schematic. The computer-based LVS was a huge step up but we still spent a lot of time manually tracing circuit connections to find (or rule out) the errors hinted at by the LVS report. Largely because of the filter programs I wrote I was able to track the error down in about a week (the five others had been trying to find the error for several weeks at that point) -- it is commonly the case that if you can bring experience in other areas to the job that you can find ways to make valuable contributions very quickly as you are coming up to speed on the bread-and-butter stuff.

    I worked there for 14 years, leaving as the Senior Engineer to take a research position at the Air Force Academy. I still have very good relations with the company and have done a lot of consulting with them in the decade since I left.

    I worked on a number of very interesting chips. One of those chips is currently in orbit about Mars. Most of our chips were designed by one to three engineers -- which was a good thing because our design flow would have broken down pretty quickly if we had had to coordinate many more people than that.

    The more you know about all of that, the better. Gee, hardly a surprise -- and so probably not very helpful advice, either. So much of it depends on what kind of ICs you want to design -- and just saying "analog" doesn't cut it. We were able to compete with the big boys -- and even have the big boys come to us to design chips for them -- only because we had expertise in a very narrow niche market that were simply a horrible match for their skill sets and work flows. Had we tried to design a chip that was in their area of competency they would have laughed all they while they crushed us effortlessly. But a huge part of our success was dependent on one person -- the president of the company -- because his expertise was in semiconductor physics and processes. He knew how to squeeze performance out of designs by knowing what you could and couldn't get away with. He also really understands noise processes and how to design circuits to mitigate them.

    I really don't know what is common out there today. The layout tool we used (and the company still uses) was ICED which is now available as free, but unsupported open-source software. It was rock-solid code, but feature limited.
     
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