Hi

I have a small issue and would like to know if this is a setting issue or a PCB fabrication issue/limitation. If it's PCB fabrication issue, how can we use their limitation in our design to avoid this small anomaly?

The issue I am having is solder mask(Green layer) sometimes does not cover the entire copper. I have a resistor R55 that is connected to GND, via a copper pour.

As you can see from the image, that design and 3cad shows a well edges solder mask, but when you look closely at the PCB you can see that it is slightly off on the bottom pad. Is this normal? Can it be rectified?

 

Same corner is cut out in your design so I'd say this one is not fab houses fault. You should fix the corner of footprint in your pcb program.

 

I see nothing wrong with the manufacturing, solder mask is always larger than the copper pad to ensure the mask doesn't cover any solder areas(pads) and disturb soldering. Since the R55 pad is middle of the copper area, mask opening will reveal that copper area as well making the R55 pad to look larger because part of the copper is now combined with the pad.
Accept the fact or avoid using pads inside the copper planes or use thermals to minimize the copper exposure via mask opening.

You should change the design and get rid of the overlapping copper in the mid R55 like this:

 

Same corner is cut out in your design so I'd say this one is not fab houses fault. You should fix the corner of footprint in your pcb program.

The footprint is fine, it's just that when a copper pour is connected to a pad I am seeing that pad dimensions are changing on physical pcb.

 

The solder mask was sized to be a fixed amount larger than the pad. You should be able adjust the oversize in your board design. Most PC board design programs allow it.

Two things stand out about your layout. First you have vias abutting your pad. This will wreak havoc during reflow and will pull solder away from the part when the solder melts. I'd suggest moving the via away from the pad far enough away so that the solder mask is separate and does not allow solder to be drawn away from the pad.

Second, you have the trace running past the pad and offset to the left. There's no reason that the trace can't come to the pad directly along the center axis. As well it shouldn't run past the pad. This is also contributing to the weird pad shape of the final PC board.

 

The solder mask was sized to be a fixed amount larger than the pad. You should be able adjust the oversize in your board design. Most PC board design programs allow it.

Two things stand out about your layout. First you have vias abutting your pad. This will wreak havoc during reflow and will pull solder away from the part when the solder melts. I'd suggest moving the via away from the pad far enough away so that the solder mask is separate and does not allow solder to be drawn away from the pad.

Second, you have the trace running past the pad and offset to the left. There's no reason that the trace can't come to the pad directly along the centre axis. As well it shouldn't run past the pad. This is also contributing to the weird pad shape of the final PC board.

Thanks I had a look.

The solder mask expansion is set to 0. Therefore I was expecting expansion to start where the pad is not a little more after. How far should a via be , as from what i have read the via next to the pad is good EMC practise?

In regards to your second point, i need to check that my copper pours are neat, that was not track but a copper pour

 

The solder mask expansion is set to 0. Therefore I was expecting expansion to start where the pad is not a little more after. How far should a via be , as from what i have read the via next to the pad is good EMC practise?

Manufacturers have their own rules for setting the mask. It's not about your requirements, its their production capabilities and their quality demand. Even that you put mask opening to zero, it will be transferred larger as it is manufacturer specific.
Zero opening is impossible since the mask laying accuracy has its tolerance. The whole purpose of the oversized mask is to avoid mask overlapping the component pad which would disturb your soldering process.

There are several methods which allow you to put the via to the pad, one is called plugged via, its more expensive and some manufacturers don't have this capability. Just don't pay too much attention to "ideal" board designs. There are practical reasons why you cant do things always in a perfect way.
For further study, get yourself IPC documentation which will cover everything about PCBs in detail.
https://www.ipc.org/TOC/IPC-HDBK-840.pdf

 

EMI issues will depend on what frequencies will be present on the board. As long as you are using frequencies in the low MHz range and it's not an RF circuit (i.e. a transmitter, etc) you won't have a problem moving the vias away. If your frequencies are higher that's a whole new topic.

Juhahoo has a good point. Plugged vias won't draw solder away. I'd suggest talking to your board manufacturer to see what their capabilities are.

Some board houses modify your solder mask to give themselves wiggle room. Solder masks have limits to the accuracy of placement. 30 years ago it was really bad but these days most PC board houses do pretty well. Again contact your board house to discuss their capabilities.

That brings me around to the importance of bringing the trace or the plane pour to the pad centered and without extraneous copper. Note as well that extending the pour past the pad won't affect EMI. You might as well stop the pour at the edge of the pad.

 

Ok, I have emailed the PCB fabrication for more information on their mask and tolerance, so instead of just setting it to 0, i will set it there tolerance value so at least I can visual see what I would be physically expecting.

This board does have a GSM module and RF 2.4Ghz modules.

Yes, I will take bit more care with the copper pours, instead of just going with the default output.

 

Is it better to use thermal relief on all pads?

I have always avoid using relief but choose to do a full copper connection, i guess that is the reason why i am getting this pad issue.

Is there a general rule when using thermal relief and it track size?

 

If you need high heat- or current transfer do not use thermals ,else use thermals.

 

Yes, I agree I guess in such circumstance the component pad might look bit larger due to mask opening tolerance. Maybe i can reduce the mask size a little for that pad, but this would be to much of manual task.

Ideally if I am correct I would need to use thermal relief. Each relief at the moment is set to 0.254mm, and a pad might have two or three.

 

I recently had an issue with a new (to me) fab house on copper clearances around pads using a pour/fill.
Using ViewMate I saw the real Gerber outputs, lesson learned.
Turns out my layout software gets another reason I think it's a POS.