PCB Routing Questions

Thread Starter

mcardoso

Joined May 19, 2020
116
Hi All,

I have 2 questions I hope you can help me with...

1) I have a 2 layer PCB (2.6" x 1.7") with 15 discrete SMT digital ICs. My first thought was to have the top layer be a ground pour and the bottom layer be VCC with vias through the board to power the chips. Does this make sense? Should both layers be ground? Are there EMI or capacitance issues with have the two layers be different signals?

2) I have an 8MHz clock shared by many of the chips on this board. Are there special concerns with routing this high frequency signal? Is it acceptable to pass this signal through vias? Should the trace width be minimized or maximized (currently 8 mil). Are there special considerations with branching the trace or avoiding sharp angles?

Thanks!
 

MrChips

Joined Oct 2, 2009
21,329
There are lots of missing information:
Voltage, current, wattage
application, analog, digital, mix-signal,
technology, type of ICs and packaging

1) Depending on the application you may not even need ground planes. For very complex wiring you may need mult-layer board.
For simple wiring, top layer and bottom layer routing may be sufficient.

2) 8MHz is not high frequency. Yes you can route signal through vias. Spacing and special considerations will depend on the application. Generally I prefer to stay with 10-15 mil traces to make for easy manufacturability. Yes, avoid sharp bends but 8MHz is not an issue. Trace lengths and number of loads need to be considered as well.
 

andrewmm

Joined Feb 25, 2011
391
With just two layers, your a bit stuck,

Its not normal to put power on an outer layer ( apart from ground ) , the possibility of making a short whilst your debugging is to great.

Its normal to with two layers to route power in a grid ,
just like other signlas, but you need to be careful with decoupling etc, its not ideal.
If you only have components on one side, I'd suggest


components on top,
mainly ground on the bottom, with tracks as needed.
top is tracks and power.

Your going to probably end up with quiet a few vias,
 

jpanhalt

Joined Jan 18, 2008
9,718
I also stick to traces 10 mil more when possible. Here's a small part of a design:
1592244480538.png

That is a footprint for an FFC connector with 0.5 mm pitch. Anything bigger than 10 mil creates a problem. You can transition to wider (e.g., 12 mil) once you get space. Different programs make that transition easier than others.

Situations differ. Having VCC and GND pours on different layers may make sense. Unless there is a reason not to have ground pours on both layers, that is what I usually do. You can, of course, have GND and VCC pours on both layers. Your pours can have different priorities. That can be helpful when you need high current traces.
 

eetech00

Joined Jun 8, 2013
1,938
I suggest signals/power on top layer.
Signals on bottom layer.
If possible, set Track/pad spacing for single track between IC pins.
Then,
Route power on top.
Route critical signals on top, bottom.
Finish with ground pour on top and bottom.

Works well for me.
 

jpanhalt

Joined Jan 18, 2008
9,718
I suggest signals/power on top layer.
Signals on bottom layer.

If possible, set Track/pad spacing for single track between IC pins.
Then,
Route power on top.
Route critical signals on top, bottom.
Finish with ground pour on top and bottom.

Works well for me.
The underlined will make getting GND's really tough. Do you mean signals and GND on bottom layer?

As for making track widths to fit between pins, I don't work with really small stuff, but how does that work with 0.5 mm pitch pins using typical DRC for cheap boards?
 

Thread Starter

mcardoso

Joined May 19, 2020
116
There are lots of missing information:
Voltage, current, wattage
application, analog, digital, mix-signal,
technology, type of ICs and packaging
5VDC, current draw dictated by draw of 15 IC's (I'll admit I haven't added them up yet since my power supply capacity is generous.

Application is digital, RS-422 in, single ended clocked combinational/sequential logic in the middle, RS-422 out. Clock speed is 8MHz.

74AC technology family with a couple 74HC thrown in when the 74AC family didn't have the chip I needed. Stuck to 14/16-SOIC for all the chips due to ease of solderability.

2) 8MHz is not high frequency. Yes you can route signal through vias. Spacing and special considerations will depend on the application. Generally I prefer to stay with 10-15 mil traces to make for easy manufacturability. Yes, avoid sharp bends but 8MHz is not an issue. Trace lengths and number of loads need to be considered as well.
Good to know, wasn't sure where the delineation between low and high frequency occurred. Longest length might be 3 inch trace. There are 6 chips that require clock signals, and a few of them have multiple clock inputs that will be tied together. Let's say 10 pins total. Clock oscillator is buffered before being fanned out to all the devices.

With just two layers, your a bit stuck,

Its not normal to put power on an outer layer ( apart from ground ) , the possibility of making a short whilst your debugging is to great.

Its normal to with two layers to route power in a grid ,
just like other signlas, but you need to be careful with decoupling etc, its not ideal.
If you only have components on one side, I'd suggest


components on top,
mainly ground on the bottom, with tracks as needed.
top is tracks and power.

Your going to probably end up with quiet a few vias,
I am guessing I will have a lot of vias. I was concerned about routing power without a pour, but if that is the norm, then I will do it. I'll make top and bottom ground pours.

I also stick to traces 10 mil more when possible. Here's a small part of a design:
If a PCB manufacturer states their capabilities at 6 mil, do you risk having trouble with 6 or 8 mil traces? I have always done 8 mil in the past and was considering going down to 6 just because it was supported and would make my life easy.

Situations differ. Having VCC and GND pours on different layers may make sense. Unless there is a reason not to have ground pours on both layers, that is what I usually do. You can, of course, have GND and VCC pours on both layers. Your pours can have different priorities. That can be helpful when you need high current traces.
Gotcha, Thanks

I suggest signals/power on top layer.
Signals on bottom layer.
If possible, set Track/pad spacing for single track between IC pins.
Then,
Route power on top.
Route critical signals on top, bottom.
Finish with ground pour on top and bottom.

Works well for me.
Maybe I'm missing something, but my chips are dimensioned in mm and the routing done in mils. This ends up with all the pads off grid.

Here is the board I need to route:

1592250688043.png

EDIT: Power and clock are in the top right corner.
 

jpanhalt

Joined Jan 18, 2008
9,718
1) Parts placement is at least 80% of the solution.
2) If you can identify units (e.g., the same chip doing similar functions), route the unit first, then put it in the whole scheme.
 

nsaspook

Joined Aug 27, 2009
7,355
With just two layers, your a bit stuck,

Its not normal to put power on an outer layer ( apart from ground ) , the possibility of making a short whilst your debugging is to great.

Its normal to with two layers to route power in a grid ,
just like other signlas, but you need to be careful with decoupling etc, its not ideal.
If you only have components on one side, I'd suggest


components on top,
mainly ground on the bottom, with tracks as needed.
top is tracks and power.

Your going to probably end up with quiet a few vias,
A complex two level 'free' board in Eagle 9.6.2 will have a few Vias but it did auto-route down to a few air-wires that needed manual fixes.
IMG_20200615_140512.jpg

I'm waiting to see the results from one of those cheap Chinese PCB houses I sent the files to.
 
Last edited:

MrChips

Joined Oct 2, 2009
21,329
You don't need ground planes. I would focus on routing signals on top layer in a horizontal direction. Power and GND go on the bottom layer in a vertical direction, keeping the traces as wide as space will allow.
 

Thread Starter

mcardoso

Joined May 19, 2020
116
A complex two level 'free' board in Eagle 9.6.2 will have a few Vias but it did auto-route down to a few air-wires that needed manual fixes.
View attachment 209832

I'm waiting to see the results from one of those cheap Chinese PCB houses I sent the files to.
looks great! Nice work. Do you trust the auto router to do a good job? I never know if it looks good or bad when it is done.
 

Thread Starter

mcardoso

Joined May 19, 2020
116
You don't need ground planes. I would focus on routing signals on top layer in a horizontal direction. Power and GND go on the bottom layer in a vertical direction, keeping the traces as wide as space will allow.
Sounds good. It seems to me, not that I know any better, that power and ground would do well on the top since it has many connections, and signal routing on the bottom where there is wide open space.

I guess you’re stuck with vias either way and maybe it is better to not have them on the signal traces. And, the signal traces are shorter and point to point so less complex routing on the already busy top side.

look at that, just talked myself into it.:D
 

MrChips

Joined Oct 2, 2009
21,329
Yes, that makes sense. Put verticals on the top layer, along with power and GND.
Put signals horizontal on the bottom layer.

Edit: I am accustomed to having more logic ICs in a vertical line up and hence usually run the power and GND traces in between the ICs.
The way you have it, it may be easier to run the power and ground horizontally.
 

nsaspook

Joined Aug 27, 2009
7,355
looks great! Nice work. Do you trust the auto router to do a good job? I never know if it looks good or bad when it is done.
So far Eagle toporouter has been good but I've got a 12 processor server machine it maxes out for long periods of time placing wires.
 

eetech00

Joined Jun 8, 2013
1,938
The underlined will make getting GND's really tough. Do you mean signals and GND on bottom layer?
yes. Two layer board.
Signals on bottom only if needed, otherwise just ground plane.
Top layer for power and signal tracks and, when finished routing, also pour a ground plane on top layer.
So there will be a ground plane on top and bottom when finished.
The idea is to create a parasitic capacitance between the power and ground signals so as to act like a filter and help reduce noise

As for making track widths to fit between pins, I don't work with really small stuff, but how does that work with 0.5 mm pitch pins using typical DRC for cheap boards?
I do it only if the pin spacing allows. But I only run a track between pins if I have no choice.
Generally, I use 8 mil tracks for signals and 10-15 mil tracks for power, but, as you probably know, it depends on the fab house capability.
 
Last edited:

jpanhalt

Joined Jan 18, 2008
9,718
@nsaspook
Have you looked at TopoR (https://en.wikipedia.org/wiki/TopoR ). Not for all EDA programs, but an interesting concept ("rubberband" routing).
It features a powerful autorouter and a set of tools intended to reduce the amount of effort needed for manual routing of a PCB. The most recognizable feature of TopoR is the absence of preferred routing directions, which results in unusual looking PCBs.
Efficient use of PCB space and absence of preferred routing directions in layers considerably reduces electromagnetic crosstalk.
Also TopoRouter and Eagle TopRouter are mentioned.
 

eetech00

Joined Jun 8, 2013
1,938
Maybe I'm missing something, but my chips are dimensioned in mm and the routing done in mils. This ends up with all the pads off grid.

Here is the board I need to route:

View attachment 209827

EDIT: Power and clock are in the top right corner.
Looks like that might need to be a four layer board.
so....this is how I would setup the PCB copper layers
Top layer 1- signal
Mid layer 2 - power
Mid layer 3 - ground
Bot layer 4 - signal

Generally, I use 8 mil tracks for signals and 10-15 mil tracks for power, but, as you probably know, it depends on the fab house capability.
I setup my grid to 100 mils. Then work out the spacings from there.

Regarding dimensions..
Hmm...that will lead to unnecessary complications. But work with whatever units your comfortable with. My PCB software doesn't care if a part is designed in mm or mils. It will convert it to whatever units I wish to use.
 
Last edited:

jpanhalt

Joined Jan 18, 2008
9,718
Maybe I'm missing something, but my chips are dimensioned in mm and the routing done in mils. This ends up with all the pads off grid.
1) Just use a program that starts or stops a trace at the center of a pad. Mine does that.

2) I also have a function key set (F6) that allows me to easily change between metric and Imperial units. Generally speaking, I only use one set of each for a board, but that is not a law in my mind. If done judiciously, you can switch grids anytime. My EDA program allows just one "alternate" grid, e.g., coarse and fine. There is no restriction on which units of measure are used for either. So, in theory, your normal grid could be set to Imperial and your alternate to metric, but that is not what I do.

Regardless of how you draw a board, most houses, I believe, switch to Imperial (at least in the USA). That may not still be the case, but with 8-decimal precision on the conversion manufacturing imprecision swamps that.
 

Thread Starter

mcardoso

Joined May 19, 2020
116
Some experts advise to use power planes to reduce inductance and other reasons. See:
David L. Jones:* PCB Design Tutorial
http://alternatezone.com/electronics/files/PCBDesignTutorialRevA.pdf

*https://en.wikipedia.org/wiki/David_L._Jones_(video_blogger) (a brief bio of David Jones)
Man, that is a great read. I know it is a bit dated, but it is exactly the baseline of knowledge I was hoping to find somewhere.

So far Eagle toporouter has been good but I've got a 12 processor server machine it maxes out for long periods of time placing wires.
At least for my board, it finished the 160 traces in about 3 minutes on High effort. Was totally worth it

1) Just use a program that starts or stops a trace at the center of a pad. Mine does that.

2) I also have a function key set (F6) that allows me to easily change between metric and Imperial units. Generally speaking, I only use one set of each for a board, but that is not a law in my mind. If done judiciously, you can switch grids anytime. My EDA program allows just one "alternate" grid, e.g., coarse and fine. There is no restriction on which units of measure are used for either. So, in theory, your normal grid could be set to Imperial and your alternate to metric, but that is not what I do.

Regardless of how you draw a board, most houses, I believe, switch to Imperial (at least in the USA). That may not still be the case, but with 8-decimal precision on the conversion manufacturing imprecision swamps that.
Eagle seems to do OK with routing off grid and making it look clean.
 
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