P-channel mosfet and 555 for power-on delay?

Thread Starter

Doktor Jones

Joined Oct 5, 2011
74
It's been forever and a day since I've been here, but I'm dipping my toes back into electronics design

Anyways, I have a "dumb" device that's connected to a hat on my Raspberry Pi 4. Unfortunately, due to some signaling issues with the dumb device, if it's on when the Pi powers on, the Pi gets severely wedged (doesn't even get to bootloader). Because this setup is remote, I need it to be power-loss-tolerant, so my "ingenious" idea is to make a simple board that delays power on of the dumb device by about 5 seconds (that's enough time for the bootloader to get started, and from there it doesn't care about the signaling issues from said dumb device).

Here are my requirements:
  • Needs to be plug and play (no microcontrollers or other stuff that needs to be programmed or might otherwise get fidgety)
  • Something I can send off to a fab and get a board made (and possibly assembled if I use all SMD)
  • Plugs in in-line to the dumb device (12V 2A power supply with bog standard 5.5mm/2.5mm barrel connector)

When I think timed stuff, the first thing I think is 555. I know it can do a monostable pulse... so now I need to figure out how to switch the power on when the pulse ends... but I don't want the power to come on before the 555 starts its pulse. Since I need a way to switch the 20-odd watts the dumb device draws anyways, my mind went to a MOSFET. As a result, I'm thinking perhaps I can tie the output of the 555 to a P-channel MOSFET with its gate pulled high.

Any refinements to my idea (or alternatives if mine's completely off kilter) are welcome!

1638835366914.png

Looking at it now I'm already realizing that the 555 is perfectly content to run on 12V (datasheet says VCC≤18V) so I can eliminate the LDO and its freakishly large caps (I'm trying to stick with parts JLCPCB/LCSC has so I can have them do the whole shebang for me, and the LDO datasheet is entirely in Chinese but the application circuits all show 10uF caps on Vin/Vout )... that should also ensure that the "high" output on pin 3 is equivalent to the drain voltage on the MOSFET to keep it off.

Oh, and I'm not sure it's entirely necessary (or even correct), but I wanted to make sure the 555 triggers at power on, so I put the 20K/10uF RC on the trigger which I figure should be enough of a pulse to poke it.

As it stands now, I managed to make a rough-out of the PCB for this and it's like 43mm (1.7") by 20mm (0.8") so I'd be quite happy if I can keep it this small (or smaller!).
 

Thread Starter

Doktor Jones

Joined Oct 5, 2011
74
No need for all the complications ..........
.
.
.
View attachment 254388
Nice! Is the RC delay calculated based on the cap + upper 10K?

While dead bug wiring is perfectly fine for my own needs, I'll be using this at a remote work site that I might need to ask someone else to fiddle with, so I'm thinking maybe a PCB+enclosure is more appropriate (also, don't want someone going poking around without discussing with me, and knock the bug against the chassis and short out the power supply)
 

Thread Starter

Doktor Jones

Joined Oct 5, 2011
74
Looking further at the TL431, is it actually the capacitor charge time that delays the switch-on time of the TL-431?

  1. Until \( V_{(cap)} \approx \frac{V_{CC}}{2} + 2.5V \), the capacitor pulls the voltage divider below the reference voltage by conducting around the lower 10K, keeping the shunt off, and the gate is pulled high by the 1K
  2. When the capacitor reaches that voltage, the shunt pulls the gate low and the MOSFET conducts

So how exactly do I calculate the desired value of C (and not wind up with some insane value like 1000uF)? Is it safe/reasonable to replace the 10K resistors with higher values (at least ≤100k, or maybe up to 220k?)

I'm looking for at least a 5s delay. It's probably overkill -- 2s would probably? be fine, but I'd rather probably have an overly large margin than "probably" have "enough" margin.

I'm a bit confused by the bit that says
Turns "ON" when Voltage here reaches ~2.5-Volts
That'd be about -9.5V? Or is that in reference to VCC, so basically when V(cap) reaches 2.5V? If so, that'd be an even shorter charge time
 
Last edited:

LowQCab

Joined Nov 6, 2012
4,029
Imagine the "Voltage-Reference" as a 1-Input Comparitor,
with the non-existent Inverting-Input being held at exactly ~2.5-Volts,
( it's actually 2.49XXX Volts ),
this is in reference to Ground, or the "Anode".

When the "adjustment-Pin" exceeds 2.5-Volts, the Diode "turns-On", and allows Current to flow to Ground.
This switching action is extremely sharp, just like a proper Comparitor-chip.

With 12-Volts-Input applied, there is potentially 6-Volts at the Capacitor,
so ....... the Capacitor starts at zero-Volts, and is being charged to 6-Volts through a 10K-Resistor.

When the Capacitor-Voltage climbs to exactly 2.5-Volts, the P-Channel-FET instantly turns-"ON",
this means that the Capacitor-Charging-Curve will be operating largely in a more Linear fashion,
rather than the usual Exponential-Curve with the final "tail" fading-out forever and losing resolution.
2.5-Volts places the "switching-point" at slightly less than
half-way through the Capacitor's exponential-charging-curve.

There are plenty of on-line Calculators for figuring out the Capacitor-charging-time.

The "effective" "minimum-Zener-Current" requires a 1ma. Load,
( this is mostly for guaranteed accuracy etc.,
and it will actually function reasonably well with less Current ).
But going by the Data-Sheet requirements,
the "FET-turn-Off-Resistor", ( which is "the-Load" ),
should be a maximum of ~12K to meet this requirement when using a 12-Volt-Supply,
so ~10K is "comfortable".

The "Reference-Pin" draws a maximum of 4uA, "Micro-Amps", and averages 2uA,
so You may get away with as large as 1M timing-Resistors,
but at that extreme You may have problems with a "slow" turn-on,
rather than a sharp, quick switch.
500K is very doable, but then You may still need to be concerned with
external noise interference causing weirdness of operation.
I recommend that You stick with ~10K, the parts aren't that "big".
.
.
.
 

crutschow

Joined Mar 14, 2008
34,285
The TL431 circuit time-delay varies with the supply voltage (which is not an apparent problem in this application).

A time-delay circuit that is largely insensitive to supply voltage would be a comparator (e.g. LM339) with the trip voltage determined by a voltage divider connected between the supply and ground.
This also has the advantage of setting the trip voltage to a higher value (such as 75% of the supply voltage) to allow the use of a smaller capacitor for a given delay.
 

LowQCab

Joined Nov 6, 2012
4,029
The Voltage-Divider-Resistors can be as large as ~500K if reducing the Capacitor size is a priority.
Also, the UVLO-function of this Circuit can be adjusted from 2.6-Volts to ~11.999-Volts if desired.
.
.
.
 

sparky 1

Joined Nov 3, 2018
756
The first schematic provided was good for a 12V 2A dumb device compatible with Raspberry Pi, remote and other issues.
The 555 timer as temporary module for a development platform is good because it is simple. I refer to an old article where 555 are replaced with PIC chip even if the IO is not needed right away a tiny MCU will be useful later. With Raspberry Pi both backward and forward compatibility will continue to need mods like your project.
https://www.nutsvolts.com/magazine/article/December2016_Replacing-555-with-PICs
The second schematic delayed one shot in part 5 why ? because it can be dependent or independent of the Pi during development.
It has input and output it would need slight modification for modes by R5 and R6 to match Pi. The versatility might enable different dumb devices.
https://www.nutsvolts.com/magazine/article/a-digital-analog-part-5
 
Last edited:

Thread Starter

Doktor Jones

Joined Oct 5, 2011
74
How would changing the voltage divider ratio affect things? Would a "top heavy" ratio (e.g. R3=470k R2=210k) move the switch-on point further down the charging curve (also tweaking the UVLO dropout voltage)? I'm thinking that since the divider's "output" voltage would be lower there, 2.5V would be ~67% charged rather than slightly under 50%; is that right? Or would tweaking the divider off of 50/50 cause undesirable side effects?

The LM339 variant sounds intriguing as well... if I sub it into this circuit, I'd actually run the middle of this voltage divider into the -IN input and a fixed voltage divider on +IN (so while the capacitor is charging the comparator outputs HIGH, keeping the MOSFET off, then when V(cap) reaches the reference voltage the comparator would pull LOW, switching on the FET? In such a case I'd want to make sure the V(cap) voltage divider is set a bit higher than the reference voltage divider, correct? (otherwise any leakage through the cap might mean the comparator never sees that voltage rise high enough and would never switch)

I was looking at doing SMD-based stuff via JLCPCB, so a 470uF capacitor is definitely on the chunky side for SMD.

Thank you all for your help so far! At this point I hardly even care about the project itself any more, now it's all about the learning! (I mean yes I still intend to build it, but the learning is so much more valuable to me than the finished project now)
 

LowQCab

Joined Nov 6, 2012
4,029
What ever the Voltage is at the Voltage-Divider ........
Just add 2.5-Volts and You have the new UVLO-Voltage.
or,
Select the desired UVLO-Voltage first,
then subtract 2.5-Volts,
then make the Voltage-Divider equal that number when
the "normal" Supply-Voltage is applied.
.
.
.
 

crutschow

Joined Mar 14, 2008
34,285
The LM339 variant sounds intriguing as well.
LTspice simulation below:
It has the advantage of the delay time being essentially independent of the supply voltage (simulation shown for a Vin of 6V and 12V..
The trip point is set to 75% of Vin.
R5 provides a small amount of hysteresis (positive feedback) to avoid any chatter at the trip point.


1639074592633.png
 
Last edited:
Top