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I have designed an patched array antenna over an electromagnetic band-gap (EBG) surface operating at 3.3–3.8 GHz. Now, I need to design a similar system for the 140 GHz D-band. However, I have never worked at such a high frequency before, so I do not know how to start. I would really appreciate your help.
The array must be fed by a CMOS beamforming transmitter, must support beam-steering requirement of ±45° in both planes. and I need to choose either an on-chip implementation, an antenna-in-package (AiP) implementation, or a hybrid approach. I am using CST Studio Suite for the design and simulation.
I would like to understand the following:
The array must be fed by a CMOS beamforming transmitter, must support beam-steering requirement of ±45° in both planes. and I need to choose either an on-chip implementation, an antenna-in-package (AiP) implementation, or a hybrid approach. I am using CST Studio Suite for the design and simulation.
I would like to understand the following:
- When I scale my design from 3.3 GHz to 140 GHz, which design principles will remain the same, and what things will I need to change?
- Which radiating element (patch, slot, dipole, dielectric resonator, etc.) should I use for this application, and why would it be suitable?
- If I choose an antenna-in-package (AiP) implementation, which substrate technology should I use, and why would it be suitable for 140 GHz?
- How can I check whether the selected approach will work at 140 GHz? What element spacing should I use for this array, and what port-to-port isolation should I target?
- How should I model conductor loss and the multilayer dielectric stack at 140 GHz? What mesh strategy should I use, and how can I keep the full 16-element simulation computationally manageable in CST?
- How should I characterize and measure the 140 GHz array? Which de-embedding structures should I include, and how can I obtain the gain and radiation pattern? What would be the dominant sources of measurement error?
