Need help to design a delay block/debouncer with IC 555

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DucMinhBK90

Joined Mar 13, 2023
1
Hi everyone,
I have a project to make a delay block/ debouncer which has same function in LTC6994-2 with IC 555. I try to combine 2 ICs 555 monostable with a pulse from Astable Mode to detect the time delay of both rising and falling edge. However it does not work. Does anyone have a suggestion or idea for this schematic design.
The function of LTC6994-2: https://www.analog.com/media/en/technical-documentation/data-sheets/LTC6994-1-6994-2.pdf
Thanks in advance.
 

Papabravo

Joined Feb 24, 2006
21,029
Two questions:

Why do you think this is possible?

Can you provide a schematic diagram of what you tried that does not work?
 

AnalogKid

Joined Aug 1, 2013
10,950
Over a narrow range of both pulse widths and pulse spacings, this can be done with one true monostable (*not* a 555), a flipflop, and a bunch of steering logic. A true monostable has positive feedback to lock out the input once it is triggered.

ak
 

crutschow

Joined Mar 14, 2008
34,074
A 555 is a great little timer circuit, but using two for this purpose seems complicated overkill.

Below is the LTspice sim of a simple circuit using one CD4093 Schmitt-trigger quad NAND gate package, to perform that function for short delay times (<10s).
It provides both inverted and non-inverted outputs.

The value of R2C2 determines both the rising and falling edge delay-time.
How much delay do you need?

1701242670700.png

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AnalogKid

Joined Aug 1, 2013
10,950
A third gate as an input buffer - ? It would make the circuit independent of any voltage/impedance/slope variations in the input signal.

And, I wondered about the stability of a CMOS Schmitt trigger's two transition levels. That is one (and, often, the only) clear advantage of a 555. Rethinking, this could be done with two 555's: one as an input buffer and one as the post-R-C, hysteretic comparator output stage.

Or, depending on the required circuit speed, one dual opamp. <oooohhh - now we're talkin'>

ak
 
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crutschow

Joined Mar 14, 2008
34,074
A third gate as an input buffer - ?
See below:
I wondered about the stability of a CMOS Schmitt trigger's two transition levels.
Certainly there are unit-to-unit variations, but I would expect the trigger point to be fairly stable otherwise.
The application here does not sound like it needs high stability but, if it does, then other circuit might be preferable.
74AC132 would be a better match vs CD4000 for post #5
Why?
The CD4000 circuits have a much higher voltage range, and should be more than fast enough for this application.

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AnalogKid

Joined Aug 1, 2013
10,950
As is often the case, there is zero information in #1 about frequencies, bandwidth, periods, risetimes, falltimes, voltages, currents, sources, or loads. Other than that, we're good to go. Some can be inferred from his consideration of the 6994, but, come on - give a dog a bone.

I love AC parts, and a long-term frustration of mine is that no one applied the AC technology to the 4000 product line. The 74AC14 one serious little puppy.

ak
 
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