Hi M,
Resistive dividers are commonly used for that purpose.
E

 

Currently, in my design, I'm using 24V, 12V and 5V. But any other supply voltage can be added considering it as a requirement. Single supply voltage would be pretty nice choice as readily available supply voltage can be used.

12V would work fine for the circuit I posted.
It would just require some adjustments to the resistor values.

 

Do you want the 10b resolution for the 5-10V signal?
If you just attenuate the signal so that 10V is the ADC's maximum input, then you would have 9bit resolution for the signal.
Is that acceptable?

It's already been attenuated. In fact, I'm reading a VFD's Analog output (AM+) control terminal. It's programed to represent DC Bus voltage and it will scale it to 0-10V.
It is a 400V class VFD, so actual bus voltage can go up to 1000V. My useful range is only from between 500-1000V. So I want to process only upper 500Volts. That's why I need full 10 bit resolution to capture 500V.

 

It's already been attenuated. In fact, I'm reading a VFD's Analog output (AM+) control terminal. It's programed to represent DC Bus voltage and it will scale it to 0-10V.
It is a 400V class VFD, so actual bus voltage can go up to 1000V. My useful range is only from between 500-1000V. So I want to process only upper 500Volts. That's why I need full 10 bit resolution to capture 500V.

I would suggest simply reducing the signal by an additional factor of two, i.e. 0-5V, and use a 10-bit or 12-bit ADC.

 

That's why I need full 10 bit resolution to capture 500V.

Okay, then do you want to use a circuit like I posted?
For best accuracy, the offset should be provided by a reference voltage, so it's not affected by the power supply voltage stability.

I can post such a circuit, if you like.
Do you want to stay with the LM358 op amp, which will have less accuracy than the original I posted?

But using an external 12-bit ADC, as MrChips suggested, would require fewer parts, while still giving 11-bit resolution to the 5V span with better accuracy (fewer sources for gain and offset error).

 

Do you want the 10b resolution for the 5-10V signal?
If you just attenuate the signal so that 10V is the ADC's maximum input, then you would have 9bit resolution for the signal.
Is that acceptable?

Using a voltage divider with a ratio of 1/3 would position the 5-10V signal in the approximate middle of the A/D range, no opamp required. 1.67V to 3.33V centered at 2.5V!

 

Okay, then do you want to use a circuit like I posted?
For best accuracy, the offset should be provided by a reference voltage, so it's not affected by the power supply voltage stability.

I can post such a circuit, if you like.
Do you want to stay with the LM358 op amp, which will have less accuracy than the original I posted?

Although power supply is nicely smoothed and regulate, a reference voltage would still be a better choice. I'll appreciate if you post a circuit.
LM358 is not so sticky. I can try to get/use any other specific chip that can provide better results.
10bit resolution, I think, should be enough.
Until now, I've decided to give a practical hand to your circuit. I'm sure it would be end of problem.
Regards.

 

I would suggest simply reducing the signal by an additional factor of two, i.e. 0-5V, and use a 10-bit or 12-bit ADC.

Reducing signal to 0-5V is the easiest. Just to scarify some part of resolution.(If using internal 10bit ADC) or otherwise to use a 12bit AD Converter.
Let me try it is enough in practical.
Thanks and regards,

 

Here's the circuit with an added TL431 programmable shunt voltage reference for generating the offset.
The TL431 is in regulation when the voltage at the control terminal is 2.5V, so here gives a Ref voltage (red trace) of 2.5V

I recommend using a low input offset rail-rail op amp such as the inexpensive one I show.
You can use the TLV9151 single op amp version, if you like.

 

Thank you all fellows for your precious time and great knowledge sharing. Thanks for holding me till end of problem. I figured it out by using circuit provided by @crutschow . All other suggestions are now in my circuit bank for future use.
Thanks again and best regards to all who helped me.

 

I figured it out by using circuit provided by @crutschow . All other suggestions are now in my circuit bank for future use.

So do you plan on using the 12V supply for your offset reference?
If so the circuit you posted is for 10V.
Below is it configured for 12V:
Of course the circuit accuracy will depend upon the actual voltage of the 12V supply, and the resistor tolerance.

 

So do you plan on using the 12V supply for your offset reference?
If so the circuit you posted is for 10V.
Below is it configured for 12V:
Of course the circuit accuracy will depend upon the actual voltage of the 12V supply, and the resistor tolerance.

View attachment 317647

An additional thank u for this. I'm using 12V as it's readily available and is regulated too. But here, in the latest 12V circuit, input is from 0-12V. (not 5-10V).
I'm terribly weak in Maths. :-(
Can you kindly give me some key points to fine tune it. (i-e) Min voltage, Maximum voltage and Gain etc.
To be precise, how can I configure it for,
input between 5.5V-8.5V and
output between 0V-5V.
If so, this will be the perfect solution of my problem.
regards.

 

give me some key points to fine tune it. (i-e) Min voltage, Maximum voltage and Gain etc.
To be precise, how can I configure it for,
input between 5.5V-8.5V and
output between 0V-5V.

Okay, using the calculation procedure posted on the schematic below--

(Note: I went through the calculations initially with no input attenuator, and realized it would not work with that input range and power supply voltage, so had to attenuate the input voltage (here by an arbitrary value of 1/2))

1. Required NI gain = 5V / ((8.5-5.5)/2) = 5V / 1.5V = 3.333

2. Required output offset is (5.5V / 2) *3.333 = 2.75V * 3.333 = (-)9.167V

3. The inverting gain is (3.333-1) = 2.333 ---- (since NI gain = 1 + inverting gain).
Required offset voltage from the R1-R2 divider is thus 9.167V / 2.333 = 3.929V
Calculated that a value of R1=22.6k and R2=11k will give a voltage divider that provides 3.93V from the 12V supply.
(Of course there are many other combinations of 1% resistors that will give near that attenuation, but this combination is among the closest. An online calculator such as this can be used to optimize the values)

4. The Thevenin equivalent parallel value of R1 and R2, which is used to determine the gain, is 7.4k.
Then for the desired NI gain of 3.333 and inverting gain of 2.333, the value of R3 is 7.4k * 2.333 = 17.3k (17.4K is closest 1% value for an actual gain of 3.338).

The above sequence of calculations may seem a bit convoluted, but it avoids having to solve any simultaneous equations which you might otherwise have to do (which I abhor).

Results below:



By adding another op amp as an offset voltage buffer (such as the second amp in the dual amp IC shown in the sim) the offset could be made adjustable without affecting the gain.
(But the inverse of that is not be true, as changing the gain would still change the offset.
Circuit below:

 

Okay, using the calculation procedure posted on the schematic below--

(Note: I went through the calculations initially with no input attenuator, and realized it would not work with that input range and power supply voltage, so had to attenuate the input voltage (here by an arbitrary value of 1/2))

1. Required NI gain = 5V / ((8.5-5.5)/2) = 5V / 1.5V = 3.333

2. Required output offset is (5.5V / 2) *3.333 = 2.75V * 3.333 = (-)9.167V

3. The inverting gain is (3.333-1) = 2.333 ---- (since NI gain = 1 + inverting gain).
Required offset voltage from the R1-R2 divider is thus 9.167V / 2.333 = 3.929V
Calculated that a value of R1=22.6k and R2=11k will give a voltage divider that provides 3.93V from the 12V supply.
(Of course there are many other combinations of 1% resistors that will give near that attenuation, but this combination is among the closest. An online calculator such as this can be used to optimize the values)

4. The Thevenin equivalent parallel value of R1 and R2, which is used to determine the gain, is 7.4k.
Then for the desired NI gain of 3.333 and inverting gain of 2.333, the value of R3 is 7.4k * 2.333 = 17.3k (17.4K is closest 1% value for an actual gain of 3.338).

The above sequence of calculations may seem a bit convoluted, but it avoids having to solve any simultaneous equations which you might otherwise have to do (which I abhor).

Results below:

View attachment 317742

By adding another op amp as an offset voltage buffer (such as the second amp in the dual amp IC shown in the sim) the offset could be made adjustable without affecting the gain.
(But the inverse of that is not be true, as changing the gain would still change the offset.
Circuit below:

View attachment 317777

Thank you very much for this great help.
Ideal resistor values are always a hurdle. Not a big problem in my case though. I can mange this tolerance in software, as I've 10bit resolution against just 3Volts. This should work perfectly.
Edit: I put all calculations in Excel sheet for ease and now it become very handy. Resistor combination optimizer is another exciting discovery. cheers.
Best Regards.

 

Sorry if I'm wrong. Unity gain non-inverting amplifier needs the output to be connected back to non inverting input. Applying 5 volt reference at non-invertig input will be equal to apply 5 volts at output. Doesn't it?

OK, here is a simple cheating trick to subtract 5 volts erom your signal without reducing the span. It will require a small amount of power externally. What you can use is one of the very small isolated DC to DC supply modules that has an ISOLATED 5.0 volt output. You may need to add a capacitor, perhaps 0.47 MFD, across the module output terminals, in case the voltage has a high frequency component. Connect the +5 volt output to your variable DC signal source positive output, and then the signal, reduced by 5 volts, will be on the negative terminal of the isolated 5 volt section. Straight subtraction and only a few dollars because you will not require much current. The sole down side is that the scheme does require a DC power supply, but it does not need much current. DIGIKEY is a reputable honest supplier that stocks such modules.Other sources also.

I did not see at first how many responses there are, but I do not think any of those will provide the isolated offset that my scheme will provide. Please let me know if my idea is not clear enough.

 

AS I understood you need a voltage shifter circuit that shift the signal from 5V to 0V.
this is a simple design of voltage shifter.



The green signal is the input and blue is the output.

 

The diode-dropping scheme will certainly come close, The requirement will be that you use a string of selected diodes which each maintain a forward voltage drop of 0.700 volts over the anticipated input range. For a one-off application that can work, for a multiple unit production run it will be a serious challenge.

 

To be precise, how can I configure it for,
input between 5.5V-8.5V and
output between 0V-5V.
If so, this will be the perfect solution of my problem.

Hi AHMAD.
This is the final result that the TS requires.
Your Diode solution does not meet this specification.
E

 

OK, E.G. What do you think about using the isolated voltage supply scheme to provide the constant 5 volt negative offset?? The possible issue that I see is excess capacitance to the common side of the circuit. MY uninformed guess is that the pulse source impedance is fairly low. In that case my suggestion will work well.

 

What you can use is one of the very small isolated DC to DC supply modules that has an ISOLATED 5.0 volt output.

Why go to the expense of the added supply, when it's not needed to do what the TS wanted?