Hello,
I am studying digital electronics and I am a bit confused about the saturation conditions of the bjt.
I knew that the bjt saturates when the Vce is close to 0 and Vbe >= 0.7. However, when I was reading about TTL I got confused.
Can someone give me some intuition and explain me why in the case where both inputs are high, why Q2 and Q4 saturate and Q3 is OFF please.

I believe I understand something wrong because I cannot see how the saturation conditions are met.
If there is a more intuitive way to think about this please let me know.
Thank you

 

Think about where the current through R1 goes when both inputs are high. (Tip. Think about the way you test a transistor using the diode test mode on a multi meter.)

Les.

 

For homework, you need to show your work before we can offer any hints. You'll learn more that way...

 

Think about where the current through R1 goes when both inputs are high. (Tip. Think about the way you test a transistor using the diode test mode on a multi meter)
For Q3 I know it must be OFF but not sure why. But you give me a more intuitive explanation about the saturation mode please? Because I know they must be in saturation but not sure why.

Les.

I know that Q1 is in reverse mode, current flow from R1 to Q2 (don't know whether current is large or not)

 

For homework, you need to show your work before we can offer any hints. You'll learn more that way...

I don't know how to start calculating. Current flows from R1 to Q2 but I don't know how to calculate how much. Also I am not sure whywhy Q3 is OFF

 

hi pj,
As this homework, we cannot give you the answer.
Perhaps this simulation [with one input] will give you a clue.
E

 

I know that Q1 is in reverse mode, current flow from R1 to Q2 (don't know whether current is large or not)

I don't know how to start calculating. Current flows from R1 to Q2 but I don't know how to calculate how much. Also I am not sure whywhy Q3 is OFF

You have the value of the resistor, you should know the value of the nominal diode (transistor junction) forward voltage drop, and the supply voltage.
From that you can calculate the current using Ohm's law.

After that calculation, you should be able to determine why Q3 is off.

You do know Ohm's law I would hope.

 

It may help to draw just the path from V+ through the resistor, and the transistor junctions to ground.

 

It may help to draw just the path from V+ through the resistor, and the transistor junctions to ground.

I have been thinking of the simulation given above. In that case Q1 is reversed thus current flow from R1 to Q2. Q2 is saturated as Vbe >= 0.7V and Vce is close to 0V so current flows to Q4. Given that the forward bias voltage of the diode is almost 0.7V then Vb3 across Q3 is 0.1V thus Q3 is OFF and Q4 is ON for similar reason.

So current flows from R2 to Q2 to Q4 and ground.
How can I calculate the voltage va as shown in the diagram? I mean the transistor is reversed which formula helps to calculate that?

 

How can I calculate the voltage va as shown in the diagram? I mean the transistor is reversed which formula helps to calculate that?

Yes, Q1 is off as a transistor.
But current can flow through Q1's base-collector junction, which is now forward biased (draw in the NPN base-collector junction direction).

 

hi pj,
I have set Vin=5V, so the voltage levels are more detailed/visible.
Should help.
E

 

How many forward biased PN junctions are there between va and the 0 volt rail ?

Les.

 

Yes, Q1 is off as a transistor.
But current can flow through Q1's base-collector junction, which is now forward biased (draw in the NPN base-collector junction direction).

You mean it is forward bias thinking of the Ebers-Moll model?
If yes, how can I calculate the current and the voltage drop? Sorry that the questions are elementary but I am confused as the notes that I have are not that good.

 

hi pj,
I have set Vin=5V, so the voltage levels are more detailed/visible.
Should help.
E
View attachment 263286

Thank you
I think the path of the current though is not different to what I described above, right?

 

You mean it is forward bias thinking of the Ebers-Moll model?

You don't need the model.
The base-collector junction just looks like a forward-biased silicon junction diode, the same as the base-emitter junction.

 

You don't need the model.
The base-collector junction just looks like a forward-biased silicon junction diode, the same as the base-emitter junction.

Ok, but how can I solve the circuit. I mean I have a 5V source, R2 a diode but no ground.
Explain this please to clear everything out as well as how can I know by inspection that a transistor is saturated or OFF as done here:
https://www.vedantu.com/question-an...lass-12-physics-cbse-603774e71bab3a5dc7202907
Which just by inspection it says that T3 is saturated (annoyingly all the sources of that I found do this without explaining why it saturated as no calculations are done)

 

Ok, but how can I solve the circuit. I mean I have a 5V source, R2 a diode but no ground

Since it now seems to be okay to provide more than hints. What are R4 and Q4 connected to?

 

hi pj,
This image gives all the information, it is up to you to put it together, post your calculations.
E

 

Ok, but how can I solve the circuit. I mean I have a 5V source, R2 a diode but no ground.

Of course you have a ground.
You follow the current from the resistor through to the emitter of Q4 at ground.
Why is that difficult to understand?

 

hi @pj33000
Did you complete your calculations.?

E