nand gate truth table

Thread Starter

PG1995

Joined Apr 15, 2011
832
Hi,

I take that an "x" stands for an unknown value which could be either "1" or "0". Is the table shown below for NAND correct? I'm focusing on the three rows with x's.

1653374359352.png
 

Thread Starter

PG1995

Joined Apr 15, 2011
832
Hi PG,
Unconnected TTL Inputs assume a Logic High.

E
Updated:
Unconnected CMOS Inputs can assume either a Logic Hi or Lo
Thanks for letting me know this!

So, I had CMOS logic in mind though didn't know that since 'x' could be either '0' or '1'.
 

ericgibbs

Joined Jan 29, 2010
18,766
Hi PG,
As you know, CMOS Gates have a High input impedance, so any close proximity electric field can induce logic input changes on an unconnected input.
E
 

Papabravo

Joined Feb 24, 2006
21,159
It may be worth pointing out the NAND gate has a DeMorgan equivalent representation which detects the presence of a 0 among the input variables. Also, the line where you have x NAND x = x is manifestly not correct.
 

crutschow

Joined Mar 14, 2008
34,281
You never leave CMOS logic inputs floating.
They can float to an intermittent voltage and draw high current with both the internal NMOS and PMOS transistors on.
I had that happen with a CMOS inverter chip I was using with the unused inputs floating, and it got very warm.
 

eetech00

Joined Jun 8, 2013
3,858
Hi,

I take that an "x" stands for an unknown value which could be either "1" or "0". Is the table shown below for NAND correct? I'm focusing on the three rows with x's.

View attachment 267905
A logical truth table shows the expected output value for each combination of input values.
An "X", as the input state, usually means that the input state doesn't effect the state of the output.
In a real circuit, the device input pin would be connected to a voltage representing either a logical "1", or logical "0".
 

BobTPH

Joined Jun 5, 2013
8,807
The rows with x’s should be indicating the result when either 1 or 0 is substituted for each x in the row. But it is incorrect. The result in all of these cases should be ~x.

Bob
 

Thread Starter

PG1995

Joined Apr 15, 2011
832
An "X", as the input state, usually means that the input state doesn't effect the state of the output.
I'm sorry but I don't follow you. I've always thought that an "x" means either 0 or 1. I'm sure I've read the same at many places.
 

Thread Starter

PG1995

Joined Apr 15, 2011
832
hi PG,
The letter 'X' denotes the Result of the logical function, ie: the Output.

Look at this PDF.

E

Added a link that may help.
https://en.wikipedia.org/wiki/Don't-care_term
Thank you!

But doesn't it also say that an 'x' value could be an unknown.

"Don't care" may also refer to an unknown value in a multi-valued logic system, in which case it may also be called an X value or don't know.[16] In the Verilog hardware description language such values are denoted by the letter "X". In the VHDL hardware description language such values are denoted (in the standard logic package) by the letter "X" (forced unknown) or the letter "W" (weak unknown).[17]
https://en.wikipedia.org/wiki/Don't-care_term#X_value
 

Ramussons

Joined May 3, 2013
1,404
Hi,

I take that an "x" stands for an unknown value which could be either "1" or "0". Is the table shown below for NAND correct? I'm focusing on the three rows with x's.

View attachment 267905
"x" as an input means that that value is "Don't Care". The output does not change whether that "x" is 0 or 1.
In the case of the 2 input NAND gate, if one is 0, the output is 1 whether the other input is 0 or 1. The second input is, therefore, shown as X - makes no difference whether it is 0 or 1
 

AnalogKid

Joined Aug 1, 2013
10,986
But doesn't it also say that an 'x' value could be an unknown.
Unknown, usually called "Don't Care" and unconnected are ***not*** the same thing. All inputs to logic gates must be terminated to a high or low state. They just must. We can go through another 18 posts, but the answer will not change.

As above, some logic families and technologies tend to assume one state or another if left floating. This is *not* the same thing as being terminated correctly. A TTL gate with a floating input is way more susceptible to both conducted and radiated noise, causing unpredictable operation and false output indications. However bad that is, it is 1000x worse with CMOS gates because:

a) it takes only femtoamps of noise current to affect the output state. That's not very much.

b) a CMOS gate can enter a linear active region, where both the upper and lower output transistors are on at the same time, Basically, the gate tries to short out the system power supply, and dies. It can happen in seconds or years. This is not a good operating condition, and should be avoided. Would you fly in an airplane designed this way?

ak
 

eetech00

Joined Jun 8, 2013
3,858
I'm sorry but I don't follow you. I've always thought that an "x" means either 0 or 1. I'm sure I've read the same at many places.
Yes. but it is traditionally interpreted as a "don't care" state when resolving the output state.
There will usually be a note placed somewhere around the truth table defining what "x" is intended to mean.

In your example table in post #13, you've shown the table in a non-standard format, so you need to define what the letter "x" means. I understand what it is intending to show, but usually, a standard truth table will show all inputs in columns at left of table, and outputs in columns at right of table. The "x" in your table takes on multiple different meanings. Your table is very confusing.

Ask yourself this...How many outputs does my NAND gate have?
 
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