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I came to the conclusion that you set yourself an impossible task. In your circuit again, errors. I concluded that there was insufficient qualification. Why do not you use standard solutions? I suspect that the idea of this scheme is not correct. I wanted to help, but did not solve your problem.

Hi Bordodynov,

I rechecked with the schematics, It seems to be a working one. As my project is about GaN transistors in totem pole circuit, I may not be able to change something big with respect to the circuit topology. Now most of the issues are fixed. At the output stage, the DC output gets clamped at 60V and reaches 100V. When I give my input below 60V, the DC output is completely fine. So I doubt there is some initial settings that is clamping my output for above 60V input. I have attached the modified scheme. Please review once, which will be a big help to me..


Thank you...

 

Hi Bordodynov,

I rechecked with the schematics, It seems to be a working one. As my project is about GaN transistors in totem pole circuit, I may not be able to change something big with respect to the circuit topology. Now most of the issues are fixed. At the output stage, the DC output gets clamped at 60V and reaches 100V. When I give my input below 60V, the DC output is completely fine. So I doubt there is some initial settings that is clamping my output for above 60V input. I have attached the modified scheme. Please review once, which will be a big help to me..


Thank you...

 

Hi...,
Thank you very much for the great help. My circuit works fine now!! I am getting boost 400V DC as output. The only concern is that the circuit simulation speed dropped again.Hope that is okay... I am happy getting the correct expected results anyways. I have attached the working file here!!! Many many Thanks again!!

Thank you!!!!!!!!!!!!!!!!!