In LTSpice I simulate with AC generator a capacitor 100µF in series with 100 Ohm resistor.
The simulation Graph Plots Current Through C and Voltage After C in the SAME Phase ?
In Theory the current should Lead the Voltage over a capacitor.
Other Simulation programs eg Simetrix and Multisim Do have a 90 Degree Phase difference between Current and Voltage.
Not in LTSpice !? Why !
The simulation Graph Plots Current Through C and Voltage After C in the SAME Phase ?
In Theory the current should Lead the Voltage over a capacitor.
Other Simulation programs eg Simetrix and Multisim Do have a 90 Degree Phase difference between Current and Voltage.
Not in LTSpice !? Why !