The datasheet of my EPLD shows sn input capacitance and output capacitance of 10pF. What is the effect on my device caused by the input and output capacitance?

 

In other words, what effect cause these capacitance in the performance on my device?

 

I don't even know what an EPLD is, but I can say it's about time. Any limited current that has to charge a capacitance to x number of volts will take time. In this case, probably in the nanosecond range.

 

I don't even know what an EPLD is, but I can say it's about time.

Usually a Electrically Programmable Logic Device, you essentially program your own unique logic in the IC rather than use standard logic gates etc, I played around with PLD's in the 80's-90's but Micros and FPGA's have tended to replace it AFAIK.
Max.

 

I don't even know what an EPLD is, but I can say it's about time. Any limited current that has to charge a capacitance to x number of volts will take time. In this case, probably in the nanosecond range.

thanks