I would like to make a device that respects the typical performance of a multistage amplifier (amplification of a small differential signal, a gain of around 80/100dB, a bandwidth in the order of tens of KHz, phase margin respected...)

A gain-bandwidth product of 5GHz? That's pretty tall order. In Texas Instruments' entire portfolio they only have four that can exceed that. It's not the sort of thing you could knock together out of a handful of mediocre small power MOSFETs.

 

Why do you need a 5 GHz Gain-Bandwidth product for a 1 kHz signal?

Is there a real need, or an “arbitrary” requirement?

 

A gain-bandwidth product of 5GHz? That's pretty tall order. In Texas Instruments' entire portfolio they only have four that can exceed that. It's not the sort of thing you could knock together out of a handful of mediocre small power MOSFETs.

hahahah thanks!
nono
Ghz, I wrote,I meant Khz. Oh yes I wrote it,I don't know why he saw Ghz..However, I fully agree with his reasoning.I would simply like an amplifier that covers at least the audio frequencies, therefore Khz

 

hahahah thanks!
nono
Ghz, I wrote,I meant Khz. Oh yes I wrote it,I don't know why he saw Ghz..However, I fully agree with his reasoning.I would simply like an amplifier that covers at least the audio frequencies, therefore Khz

5GHz GBW product = 100dB (x100,000) x a_few_tens_of_kHz (assumed to be 50kHz).
If you aim for an amplifier with a very wide bandwidth, its 1/f noise corner tends also to be at a higher frequency, so it is noisier in the audio band.

 

5GHz GBW product = 100dB (x100,000) x a_few_tens_of_kHz (assumed to be 50kHz).
If you aim for an amplifier with a very wide bandwidth, its 1/f noise corner tends also to be at a higher frequency, so it is noisier in the audio band.

At high gain I want a band center that is in the Khz order... in correspondence with the first pole, for example, before the cut-off freq at -3dB.I would like to keep the GBW of the differential stage which is around 1Mhz, even less is fine

 

this is the band that features only the differential stage of my circuit. except that when I go to connect the next CS stage to amplify I have no gain and I lose a lot of bandwidth

 

So you really want to make your own audio op-amp. Here’s John Linsley Hood’s thoughts on it, but you would be hard pressed to improve on some of the available op-amps these days. Linsley-Hood wrote this about 30 years ago. And you certainly won’t achieve it with 2N7000 s as the input device.
and there’s a cascode!

 

I was just now trying to amplify the signal with a totem pole stage... thank you so much for the material provided!!

 

I was just now trying to amplify the signal with a totem pole stage... thank you so much for the material provided!!

For a totem-pole stage, try the SRPP.
or a mu-follower.

 

Greetings!! but to calculate the efficiency of my circuit, I just need to see on Ltspice the power that my dual power supply dissipates, see the power dissipated at the output Pout at the buffer stage and apply the formula Eta=(Pout/ Pgen)*100? With the class A (common drain) output stage I have an efficiency of around 16% = (0.96w/5.7w)*100. I saw that the efficiency for the class A amplifier is around 25%, can the value I obtained be considered truthful? A thousand thanks!!

 

Greetings!! but to calculate the efficiency of my circuit, I just need to see on Ltspice the power that my dual power supply dissipates, see the power dissipated at the output Pout at the buffer stage and apply the formula Eta=(Pout/ Pgen)*100? With the class A (common drain) output stage I have an efficiency of around 16% = (0.96w/5.7w)*100. I saw that the efficiency for the class A amplifier is around 25%, can the value I obtained be considered truthful? A thousand thanks!!

That 25 percent is probably with maximum modulation and zero output device resistance at the peaks as well as zero drive current.
We could look at this in great detail if you still have doubts.

The thing is though, if you use an emitter follower with the load resistor taking the place of the emitter resistor AND the load resistor, then the max theoretical efficiency is 75 percent. This configuration means only one resistor that becomes both the load and the emitter resistor. More often we would see a separate emitter resistor and load resistor (2 resistors) and so the efficiency can be MUCH lower, and in this case it depends highly on what value the emitter resistor is as compared to the load resistor. For example, with Re=Rload the efficiency would drop to half that, about 37.5 percent. It's probably more common to see Re set even lower than that. Thus, the maximum efficiency depends highly on the actual configuration.

 

That 25 percent is probably with maximum modulation and zero output device resistance at the peaks as well as zero drive current.
We could look at this in great detail if you still have doubts.

The thing is though, if you use an emitter follower with the load resistor taking the place of the emitter resistor AND the load resistor, then the max theoretical efficiency is 75 percent. This configuration means only one resistor that becomes both the load and the emitter resistor. More often we would see a separate emitter resistor and load resistor (2 resistors) and so the efficiency can be MUCH lower, and in this case it depends highly on what value the emitter resistor is as compared to the load resistor. For example, with Re=Rload the efficiency would drop to half that, about 37.5 percent. It's probably more common to see Re set even lower than that. Thus, the maximum efficiency depends highly on the actual configuration.

at the output I have a pmos version common drain stage with a load capacitance of 11pF. I have a dual supply voltage +-10V and the drain output current of the driver device is 48mA, so the total output power is 0.96W. I calculated this without connecting the load capacity. Is this correct?

 

at the output I have a pmos version common drain stage with a load capacitance of 11pF. I have a dual supply voltage +-10V and the drain output current of the driver device is 48mA, so the total output power is 0.96W. I calculated this without connecting the load capacity. Is this correct?

Hi,

Is that 48ma a peak or RMS measurement?

Assuming it is an RMS measurement, since your power supply is plus and minus 10v that means the output voltage peak would be 10v which is not RMS. To convert that to RMS you would divide by the square root of 2.
With both current and voltage in RMS you can then multiply.
If the 48ma is a peak measurement, then you convert that to RMS too before you multiply.

 

Hi,

Is that 48ma a peak or RMS measurement?

Assuming it is an RMS measurement, since your power supply is plus and minus 10v that means the output voltage peak would be 10v which is not RMS. To convert that to RMS you would divide by the square root of 2.
With both current and voltage in RMS you can then multiply.
If the 48ma is a peak measurement, then you convert that to RMS too before you multiply.

yes thank you very much!!this is my ltspice schematic and I would like to know if there is any ltspice directive to measure the efficiency correctly. The schematic is attached.. With the RMS values I have 10V/sqrt(2) * (48mA/sqrt(2) = 0.245, so in percentual is 24%. I think it is good..

 

yes thank you very much!!this is my ltspice schematic and I would like to know if there is any ltspice directive to measure the efficiency correctly. The schematic is attached.. With the RMS values I have 10V/sqrt(2) * (48mA/sqrt(2) = 0.245, so in percentual is 24%. I think it is good..

Hi,

Well just to be clear, did you find that 48ma to be a peak measurement as well? Because if that is RMS then the result comes closer to 0.339 watts or something like that. That also assumes zero voltage drop in the output stage transistors and does not include output transistor drive current and stuff like that. If your transistors drop say 1.0 volts, then you would start with 9v instead of 10v.
I'll see if I can run your asc file.

Ok I tried to open your LT Spice file but it would not open for me. All it says is "ignoring unknown V" and then provides a blank schematic. It could be because I am using an older version of the program, but I don't want to update just yet because they changed things a lot and added a lot of unnecessary stuff.
You could post a screen shot (picture image) of your most recent schematic I can work from that.

 

Hi,

Well just to be clear, did you find that 48ma to be a peak measurement as well? Because if that is RMS then the result comes closer to 0.339 watts or something like that. That also assumes zero voltage drop in the output stage transistors and does not include output transistor drive current and stuff like that. If your transistors drop say 1.0 volts, then you would start with 9v instead of 10v.
I'll see if I can run your asc file.

Ok I tried to open your LT Spice file but it would not open for me. All it says is "ignoring unknown V" and then provides a blank schematic. It could be because I am using an older version of the program, but I don't want to update just yet because they changed things a lot and added a lot of unnecessary stuff.
You could post a screen shot (picture image) of your most recent schematic I can work from that.

Yes of course, thank you!! In the attachment I also include the screen of the operating point of each component in the schematic at least it will be clear to observe the voltages and currents involved..

 

Yes of course, thank you!! In the attachment I also include the screen of the operating point of each component in the schematic at least it will be clear to observe the voltages and currents involved..

What was it you were after now, was it the efficiency? There are a lot of stages to consider, but since you have a schematic in a spice environment probably the easiest way to find the efficiency is to measure it.

If you cannot find any other way, here is one way to do it...
1. Measure the current coming from the power supply, multiply that by the voltage of the power supply (would have to do both rails).
2. Average this over time, that gives you the power input. There might be a function "avg" you can use, but if not, you just low pass filter it with say a 10k resistor and a large capacitor. The input power measurement is then taken from across the capacitor.
3. Repeat all that for the output voltage and current into the load.
4. Now that you have Pin and Pout, use division Pin/Pout and plot that.

Since the averages take a while to settle down you might have to wait a little bit for them to become steady and then the efficiency measurement will become steady. If it becomes almost steady but not quite perfectly steady, estimate where the average of that wave is, and that is usually not hard to do by looking at the plot.

One thing to watch out for is if any of the components have an internal voltage source of their own. In that cause you'd have to also estimate what power that is supplying to the device and add that in.