Hi Dear Members,

I have a homework. My homework is that my school code (180757095) will be written on a 7-segment, however, there are four conditions for doing this:

1-) In turn (1>8>0>7>5>7>0>9>5)
2-) Periodically (For Example: Between 1 and 8--> 2 seconds)
3-) The counter have to back to square one.
4-) The followings have to be used in this project:
There is a problem when creating the truth table. How can I put repeating numbers to the current positions or next positions in the J-K truth table? I have tried so hard on this problem. I desinged a truth table and J-K flip-flop circuits, but outputs was wrong.
I wonder if you might help me this circumstance?

 

Hello,

The posted image seems to be broken.
When I try to look at the image directly, I get an 403 Forbidden error.
Please upload the picture to the firum using the "Upload a File" button, below the edit box.

Bertus

 

You have nine digits so you need 9 latches whose outputs are connected to 9 BCD-7 Segment decoders. The inputs to the 9 latches are driven by 9 BCD Shift Registers. The least significant shift register is connected to four 10:1 multiplexers. The multiplexers are programmed to output 10 4 bit values according to the value of a decade counter. The decade counter is reset to 1. In this state it outputs four bits for the value 1 and this is loaded into the least significant shift register. All nine digits of the shift register an shifted 4 times moving least significant digit to the next position. The state counter is incremented to 2 which selects the value 8 from the multiplexers. Continue until nine digits have been transferred to the shift register, then load the shift register into the nine latches. Wash Rinse Repeat. I don't see where truth tables will do you the slightest bit of good.

 

Hi Dear Members,

I have a homework. My homework is that my school code (180757095) will be written on a 7-segment, however, there are four conditions for doing this:

1-) In turn (1>8>0>7>5>7>0>9>5)
2-) Periodically (For Example: Between 1 and 8--> 2 seconds)
3-) The counter have to back to square one.
4-) The followings have to be used in this project:
There is a problem when creating the truth table. How can I put repeating numbers to the current positions or next positions in the J-K truth table? I have tried so hard on this problem. I desinged a truth table and J-K flip-flop circuits, but outputs was wrong.
I wonder if you might help me this circumstance?

The key is to not try to make a circuit that counts 1,8,0,7,.... Instead, think in terms of a normal counter and then a circuit that says if my input can be interpreted as a 3, I produce an output that can be interpreted as a 7.

 

Hello,

The posted image seems to be broken.
When I try to look at the image directly, I get an 403 Forbidden error.
Please upload the picture to the firum using the "Upload a File" button, below the edit box.

Bertus

Hi Dear Bertus, I didn't changed because of time up.
https://www.docdroid.net/3Da50C8/whatsapp-image-2018-12-13-at-222714.pdf

 

You have nine digits so you need 9 latches whose outputs are connected to 9 BCD-7 Segment decoders. The inputs to the 9 latches are driven by 9 BCD Shift Registers. The least significant shift register is connected to four 10:1 multiplexers. The multiplexers are programmed to output 10 4 bit values according to the value of a decade counter. The decade counter is reset to 1. In this state it outputs four bits for the value 1 and this is loaded into the least significant shift register. All nine digits of the shift register an shifted 4 times moving least significant digit to the next position. The state counter is incremented to 2 which selects the value 8 from the multiplexers. Continue until nine digits have been transferred to the shift register, then load the shift register into the nine latches. Wash Rinse Repeat. I don't see where truth tables will do you the slightest bit of good.

Sir, Thank you so much. İf you don't mind, could you look this pdf? I understand you, but we have to use that materials list.
https://www.docdroid.net/3Da50C8/whatsapp-image-2018-12-13-at-222714.pdf

 

I see latches, shift registers, counters, and BCD-7segment decoders. So what is the problem?
Start with the displays, latches, and shift registers. That part should be simple enough. Show us what you come up with.

HINT: A shift register or a counter can function as a latch or storage register if it has a parallel load capability. You don't necessarily need a part with the name "latch" -- all you need is the function.

 

I see latches, shift registers, counters, and BCD-7segment decoders. So what is the problem?
Start with the displays, latches, and shift registers. That part should be simple enough. Show us what you come up with.

HINT: A shift register or a counter can function as a latch or storage register if it has a parallel load capability. You don't necessarily need a part with the name "latch" -- all you need is the function.

On materials list, We don't have nine "BCD TO SEVEN SEGMENT DECODER" and "SHİFT REGİSTER". We only have 2 diffirent shift register and 1 bcd to seven-segment decoder.

You have nine digits so you need 9 latches whose outputs are connected to 9 BCD-7 Segment decoders. The inputs to the 9 latches are driven by 9 BCD Shift Registers. The least significant shift register is connected to four 10:1 multiplexers. The multiplexers are programmed to output 10 4 bit values according to the value of a decade counter. The decade counter is reset to 1. In this state it outputs four bits for the value 1 and this is loaded into the least significant shift register. All nine digits of the shift register an shifted 4 times moving least significant digit to the next position. The state counter is incremented to 2 which selects the value 8 from the multiplexers. Continue until nine digits have been transferred to the shift register, then load the shift register into the nine latches. Wash Rinse Repeat. I don't see where truth tables will do you the slightest bit of good.

 

I see latches, shift registers, counters, and BCD-7segment decoders. So what is the problem?
Start with the displays, latches, and shift registers. That part should be simple enough. Show us what you come up with.

HINT: A shift register or a counter can function as a latch or storage register if it has a parallel load capability. You don't necessarily need a part with the name "latch" -- all you need is the function.

Do you say this one?
https://www.docdroid.net/3Da50C8/whatsapp-image-2018-12-13-at-222714.pdf

 

Sorry, I copied wrong it.
https://www.instructables.com/id/Shift-Register-With-7-Segment-Display/

 

This is a classic exercise in an introductory course on digital logic.
There are various ways to solve this. Since this is homework I can only provide you with hints to finding a solution.

Since you have nine states, you will need a minimum of four flip-flops. However, four is just the minimum. (Hint #1)
Each state has to be unique.
Since there are two '7', how can you make the two unique?
Similarly, there are two '5' and two '0'.
Notice that 0, 5 and 7 require only three bits to be displayed. (Hint #2 - This could possibly lead to one solution. There are other solutions,)

 

This is a classic exercise in an introductory course on digital logic.
There are various ways to solve this. Since this is homework I can only provide you with hints to finding a solution.

Since you have nine states, you will need a minimum of four flip-flops. However, four is just the minimum. (Hint #1)
Each state has to be unique.
Since there are two '7', how can you make the two unique?
Similarly, there are two '5'.
Notice that 5 and 7 require only three bits to be displayed. (Hint #2 - This could possibly lead to one solution. There are other solutions,)

Sir, I already understand it, but I can't go through a phase that I can't design flip-flop truth table. I can design it, however, it isn't simplified corretly. Would you mind if you might create the number of "180757095" truth table?

 

Sir, I already understand it, but I can't go through a phase that I can't design flip-flop truth table. I can design it, however, it isn't simplified corretly. Would you mind if you might create the number of "180757095" truth table?

Yes. This is called a synchronous counter design.
Each state has to be unique.
How would you make each state unique?
I have given you clues above.

 

Yes. This is called a synchronous counter design.
Each state has to be unique.
How would you make each state unique?
I have given you clues above.

Do you mind if you could check truth table which I designed?

 

I see latches, shift registers, counters, and BCD-7segment decoders. So what is the problem?
Start with the displays, latches, and shift registers. That part should be simple enough. Show us what you come up with.

HINT: A shift register or a counter can function as a latch or storage register if it has a parallel load capability. You don't necessarily need a part with the name "latch" -- all you need is the function.

Sir, Please, Dou you mind if you could check truth table which I designed? Please Sir!

 

Sir, Please, Dou you mind if you could check truth table which I designed? Please Sir!

Sorry. I cannot open a Microsoft word document.

 

You still have not indicated how you are going to make each state unique.
You cannot have multiple occurrences of the same state. Each one has to be different.

 

Sorry. I cannot open a Microsoft word document.

 

No. Your truth table is all wrong.
The first thing you need to decide is how many bits do you need. Is it 4 bits or 5 bits? Read all of my previous three posts.

If it is a 4-bit state machine, then there are 16 unique states, You will show 16 rows in the truth table in sequence 0-15.

If it is a 5-bit state machine, then there are 32 unique states, You will show 32 rows in the truth table in sequence 0-31.

 

Instead of trying to make a single circuit that does everything in some convoluted way -- something that we often like to do so that we can either pat ourselves on the back for our cleverness or because we haven't learned to step back and apply functional decomposition -- try to step back and break the problem into small, easy to design and implement pieces.

We want to display a sequence of 9 digits.

Can we make a counter that goes 0,1,2,3,4,5,6,7,8,0,1,2,3,4,5,.... at a rate of two seconds per state?

Can we make a circuit that takes a 4-bit binary value and displays that value on a 7-segment display?

These are both basic circuits that you should be familiar with and know how to implement.

So now we just need a circuit that takes one 4-bit input and maps it to a 4-bit output. Well, that's just four separate circuits that take a 4-bit input and produce a 1-bit output. That should be something that you should be familiar with and know how to implement.

I suggested this two days ago and you have been spinning your wheels trying to be clever instead of spending a half hour to just solve the problem.