How to make a low ON resistance with NMOS with reasonable length and width

Thread Starter

achen

Joined Sep 11, 2022
18
I am trying to make a switch with NMOS, my goal is to achieve very low ON resistance.
I want the On resistance as small as possible. Using the NMOS model I am using, I found that with width as 180cm and length as 1nm gives me 1.86*10^-6 Ohm
but this is obviously impractical as the width is not possible to be 180cm and length not possible to be 1nm. How should I do it in way that is more reasonable?
 

WBahn

Joined Mar 31, 2012
27,391
I am trying to make a switch with NMOS, my goal is to achieve very low ON resistance.
I want the On resistance as small as possible. Using the NMOS model I am using, I found that with width as 180cm and length as 1nm gives me 1.86*10^-6 Ohm
but this is obviously impractical as the width is not possible to be 180cm and length not possible to be 1nm. How should I do it in way that is more reasonable?
Define "as small as possible".

Define "reasonable".

What is your minimum gate length?

How much area are you willing to devote to this transistor?

What is the minimum spacing for interdigitated fingers?

What current will this transistor have to support?

What are the max current density limits, including electromigration, for the layers involved?
 
Top