Hello, I am designing full-bridge SMPS with a linear voltage stabilizer in LTspice. When I was making measurements I discovered that the maximum efficiency of my power supply is around 30% at full load.
Project assumptions:
Input voltage: 230 AC
Output voltage: 0 - 25 V DC
Output current: 5 A (maximum)
Output power: 125 W (maximum) (I know Full-Bridge topology isn't the best fit for this power level)
I think the main problem with the low efficiency is that I have implemented an RC snubber circuit on the primary side of the transformer to prevent the voltage oscillations when turning transistors OFF.
Transformer inductance values:
L1 (primary) = 15 mH
L2 (secondary) = 0.15 mH
Switching frequency: f = 100 kHz
RC snubber values:
R_pararell = 100 Ohms
C_pararell = 10 pF
And I know why there is a lot of power dissipation, so I changed the values by increasing resistance up to 9k Ohms and capacitance to 100 pF. And then the maximum efficiency was around 75% at full load. This is much better.
However, with the RC snubber (9k, 100p) I cannot recieve good voltage regulation on the LC filter (on the secondary side of the transformer) because the turn off time is very long (I think due to lower current value) and that affects the duration of dead time (it is very well seen at low duty cycles ~ 10%). And that affects efficiency for lower output voltage values.
I am stuck with this problem and cannot think of any other solution how to:
1. Achieve better efficiency (I was hoping to get more than 85% or 88% at full load).
2. Achieve good voltage regulation by changing the duty cycle.
3. Prevent the voltage oscilations on the transformer (especially at low duty cycles).
Please find attached .asc file and the schematic of my power supply.
Feel free to ask any question you want,
Thank you for your help in advance.
Project assumptions:
Input voltage: 230 AC
Output voltage: 0 - 25 V DC
Output current: 5 A (maximum)
Output power: 125 W (maximum) (I know Full-Bridge topology isn't the best fit for this power level)
I think the main problem with the low efficiency is that I have implemented an RC snubber circuit on the primary side of the transformer to prevent the voltage oscillations when turning transistors OFF.
Transformer inductance values:
L1 (primary) = 15 mH
L2 (secondary) = 0.15 mH
Switching frequency: f = 100 kHz
RC snubber values:
R_pararell = 100 Ohms
C_pararell = 10 pF
And I know why there is a lot of power dissipation, so I changed the values by increasing resistance up to 9k Ohms and capacitance to 100 pF. And then the maximum efficiency was around 75% at full load. This is much better.
However, with the RC snubber (9k, 100p) I cannot recieve good voltage regulation on the LC filter (on the secondary side of the transformer) because the turn off time is very long (I think due to lower current value) and that affects the duration of dead time (it is very well seen at low duty cycles ~ 10%). And that affects efficiency for lower output voltage values.
I am stuck with this problem and cannot think of any other solution how to:
1. Achieve better efficiency (I was hoping to get more than 85% or 88% at full load).
2. Achieve good voltage regulation by changing the duty cycle.
3. Prevent the voltage oscilations on the transformer (especially at low duty cycles).
Please find attached .asc file and the schematic of my power supply.
Feel free to ask any question you want,
Thank you for your help in advance.
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