full-bridge

I am debugging a DC-DC full-bridge converter where the power stage and gate drive operate correctly in open-loop, but the gate driver ICs repeatedly fail when the control loop is closed. I am looking for insights into what mechanisms could cause this behavior. System Overview 1. Topology...

I am making a step up DC-DC converter using a full bridge configuration and bridge rectifier output, using high speed rectifier diodes. I see that in many designs on the net, they use an additional inductor on the output side between the rectifying diodes and smoothing capacitor. I have tried...

Hello, I designed attached circuit to drive H Bridge. My generated input signals are in attached picture, duty cyce that I am using is 40% for each signal, 99 kHz frequency. As result I am getting really bad shape of signal on R9 resistor. I am no getting steep signal when I turning H bridge...

Hello, I am designing full-bridge SMPS with a linear voltage stabilizer in LTspice. When I was making measurements I discovered that the maximum efficiency of my power supply is around 30% at full load. Project assumptions: Input voltage: 230 AC Output voltage: 0 - 25 V DC Output current: 5 A...