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I'm a newbie studying electronics. I'm having difficulty understanding how a basic PLL works. As I understand, when the VCO and reference sinusoid are equal in frequency, the error signal from the loop filter will be some DC that is proportional to the phase difference between the two signals. This DC error signal is also used to drive the VCO, where frequency is proportional to the DC error signal. Does this mean that the phase difference between the VCO output and the reference sinusoid is always a constant each time we power-cycle this setup?
How is the PLL error signal from the loop filter related to the VCO output?
- Thread starter ianyappy
- Start date
Hello there,
Do you know how a linear voltage regulator works when it has an overkill integrating stage?
Every linear voltage regulator has a bit of intrinsic integration, but if you add an integrating stage to add stability you get a voltage regulator with more than usual integration.
If we take a quick look at this first, we see that we have a reference voltage Vref that is compared to the feedback signal, and the feedback signal is usually divided down with a voltage divider so that the output can be 10v when the feedback signal is just maybe 1.25 volts. Thus when Vref is set to 1.25v the output is 10v because there is zero error.
Taking a closer look, after some load is added to the output the output may drop to 9v, and that will mean the feedback signal drops also, so now the error amp sees a negative error and so generates a larger signal to the integrator stage. The integrator stage output then starts to ramp up, and that means the output (perhaps with a drive stage) goes back up and so the feedback signal goes up and the error becomes less. The integrator input is thus less, and so there is less signal to integrate now, so the output of the integrator stops increasing and the output stays at around 10v, even with the new load connected.
Now you can think of the PLL system in much the same way, except replace the drive stage with an oscillator, and replace the voltage divider with a frequency divider, and replace the error amplifier with a phase detector that outputs a PWM signal to the integrator where a larger PWM pulse width means a larger phase difference which is the phase error.
When the frequency drifts down, the phase detector outputs a wider pulse due to the phase difference, so the integrator gets a wider pulse to integrate. The output of the integrator ramps up higher, so the oscillator frequency ramps up, which means the phase again becomes close to zero difference. That in turn causes a smaller pulse width which means less to integrate which means less additional increase in frequency. Eventually it reaches the correct phase again.
So they are both feedback systems that are similar except for some different components that work on either voltage or frequency/phase.
Do you know how a linear voltage regulator works when it has an overkill integrating stage?
Every linear voltage regulator has a bit of intrinsic integration, but if you add an integrating stage to add stability you get a voltage regulator with more than usual integration.
If we take a quick look at this first, we see that we have a reference voltage Vref that is compared to the feedback signal, and the feedback signal is usually divided down with a voltage divider so that the output can be 10v when the feedback signal is just maybe 1.25 volts. Thus when Vref is set to 1.25v the output is 10v because there is zero error.
Taking a closer look, after some load is added to the output the output may drop to 9v, and that will mean the feedback signal drops also, so now the error amp sees a negative error and so generates a larger signal to the integrator stage. The integrator stage output then starts to ramp up, and that means the output (perhaps with a drive stage) goes back up and so the feedback signal goes up and the error becomes less. The integrator input is thus less, and so there is less signal to integrate now, so the output of the integrator stops increasing and the output stays at around 10v, even with the new load connected.
Now you can think of the PLL system in much the same way, except replace the drive stage with an oscillator, and replace the voltage divider with a frequency divider, and replace the error amplifier with a phase detector that outputs a PWM signal to the integrator where a larger PWM pulse width means a larger phase difference which is the phase error.
When the frequency drifts down, the phase detector outputs a wider pulse due to the phase difference, so the integrator gets a wider pulse to integrate. The output of the integrator ramps up higher, so the oscillator frequency ramps up, which means the phase again becomes close to zero difference. That in turn causes a smaller pulse width which means less to integrate which means less additional increase in frequency. Eventually it reaches the correct phase again.
So they are both feedback systems that are similar except for some different components that work on either voltage or frequency/phase.
Last edited:
If nothing else has changed and the reference frequency is the same then, yes the phase difference between the VCO output and the reference frequency will be the same after a power-cycle.
