How do I make my PMOS circuit characteristic look like this in LTPSICE?

Thread Starter

Kai Chiang

Joined Oct 27, 2015
12
This is my PMOS circuit.
upload_2016-8-31_21-36-13.png

This graph obtained using LTSPICE. The graph is Isd VS Vsd
upload_2016-8-31_21-37-3.png

upload_2016-8-31_21-39-23.png

I am trying to make it look like the one above but when I sweep it from vsd 0 to -3 with a increment value of -0.01 , it becomes one straight line.This is what I mean.
upload_2016-8-31_21-41-24.png

Did I do anything wrong? I am still quite new to LTspice :(
 

Attachments

Thread Starter

Kai Chiang

Joined Oct 27, 2015
12
I would also like to check if circuit connection is correct in LTSPICE? (I believe it is correct)
co
I am using this circuit for PMOS parameter extraction
 

crutschow

Joined Mar 14, 2008
34,451
Your polarity is reversed for Vsd.
You have the minus connected to the drain and then you have a minus for the parameter which gives a plus voltage on the drain.

Below is an example showing the plot as you wanted.


upload_2016-9-1_9-30-45.png
 
Last edited:

Thread Starter

Kai Chiang

Joined Oct 27, 2015
12
Hi. Thank you very much for your help.
I am wondering in my original circuit , when I set the voltage to negative , wont it reverse the polarity of vsd and vsg? but it doesn't produce the result i want.
upload_2016-9-2_16-24-47.png
 

Alec_t

Joined Sep 17, 2013
14,314
Your circuit exactly as in post #1 will give you the wanted result if you left-click the horizontal axis of the plot and set the Quantity Plotted value to -Vsd.
 

crutschow

Joined Mar 14, 2008
34,451
I showed you polarities that work in post #5.
Why then did you invert the sources in post #6 , which inverts the polarities? :confused:

If you specify a positive voltage for a source then the (+) output will be positive with respect to the (-) output
If you specify a negative voltage for a source then the (+) output will be negative with respect to the (-) output.
 
Top