A few days ago I received an assignment which is about the creation of a Sklansky adder in VHDL. However, before I move to the coding part, I have

trouble understanding the exact mechanisms of the algorithm. Below you can see 2 pictures I have found which show the tree of a 16-bit Sklansky

adder and the circuits that are represented by the black and grey boxes. The triangles are just buffers.

Assuming we add the 16-bit A and B, I know that I have to find the generate and propagate values for each pair of bits A(i) and B(i) which are produced

from the following equations

I also know that at some point I will have to find carry values with the equation:

but I can't find a detailed explanation about how all that ties together. I don't know which are the steps that take place after I get to the final

stage in the picture, which is depicted by the bottom box (the one with the numbering 0:0, ... 15:0), and the professor who assign this has been

less than helpful so far with cryptic explanations and confusing clarifications. I have no idea what happens after I am through with the black/grey

components and the buffers. Since the signal that reaches the final stage are exits from the grey components, I assume these will be G (generate) values. How do I go from there to the output of the circuit? Is a full adder used at that point. Where do I use the carry values that the image shows? If someone can help me understand the basics and the flow of the algorithm, I will be grateful, even if it's only a link that offers the explanation I seek. Thank you